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Drivers PMIC Example for xplain Documentation

Introduction

This example shows elementary use of the Programmable Multilevel Interrupt Controller and Global interrupt management. It demonstrates:

  • definition of Interrupt Service Routines (ISRs)
  • enabling of individual interrupt levels
  • global enabling of interrupts
  • interruptability of lower interrupt levels

Main files:

PMIC and interrupt APIs

The PMIC API can be found here. The interrupt API can be found here.

Device Info

All AVR XMEGA devices with a type 0 timer/counter on port C can be used. The example has been tested on the following boards:

  • Xplain
  • XMEGA A1 Xplained
  • XMEGA A3BU Xplained

Description of the example

Six I/O pins and a timer/counter (TCC0) are used in this example. Three of the I/O pins (LED_PIN_0 , LED_PIN_1 , LED_PIN_2) are used to control on-board LEDs, while the rest (BUTTON_PIN_0 , BUTTON_PIN_1 , BUTTON_PIN_2) are used for input from on-board buttons (active low).

The timer/counter is run in normal waveform generation mode, with the compare channels A and B enabled. The interrupts for the compare channels, and the timer/counter overflow are configured with LOW, MEDIUM and HIGH levels, respectively. These interrupts will trigger in sequence, and their service routines (ISR) toggle their respective LEDs on and off.

To prevent the ISRs from returning, the user can press and hold the button that corresponds to an ISR's LED, e.g., BUTTON_PIN_0 for LED_PIN_0. The ISRs for interrupts of higher level will still execute in this case, causing only the LEDs with higher pin number to toggle. Once the button is released, the ISR will return and pending interrupts be handled.

Compilation Info

This software was written for the GNU GCC and IAR for AVR. Other compilers may or may not work.

Contact Information

For further information, visit Microchip.