Driver for the ADCIFA (Analog-to-Digital Converter Interface A).

Provides functions for configuration of conversion parameters (up to 12-bit signed at 1.5 Msps), channel sequencing (max. 16 channels, w/ 16 different inputs and up to 64x gain), window monitoring, interrupt and conversion triggering.

Data Structures
struct	adcifa_opt_t
	Parameters for the ADCIFA peripheral. More...

struct	adcifa_sequencer_conversion_opt_t
	Parameters for an conversion in the Sequencer. More...

struct	adcifa_sequencer_opt_t
	Parameters for the configuration of the Sequencer. More...

struct	adcifa_window_monitor_opt_t
	Parameters for the windows monitor mode. More...

Macros
#define	ADCIFA_clear_eoc_sequencer_0() ((AVR32_ADCIFA.scr) \|= (1 << AVR32_ADCIFA_SCR_SEOC0))
	Sequencer 0 : Ack end of Conversion. More...

#define	ADCIFA_clear_eoc_sequencer_1() ((AVR32_ADCIFA.scr) \|= (1 << AVR32_ADCIFA_SCR_SEOC1)
	Sequencer 1 : Ack end of Conversion. More...

#define	ADCIFA_clear_eos_sequencer_0() ((AVR32_ADCIFA.scr) \|= (1 << AVR32_ADCIFA_SCR_SEOS0))
	Sequencer 0 : Ack end of Sequence. More...

#define	ADCIFA_clear_eos_sequencer_1() ((AVR32_ADCIFA.scr) \|= (1 << AVR32_ADCIFA_SCR_SEOS1))
	Sequencer 1 : Ack end of Sequence. More...

#define	ADCIFA_clear_window_0() ((AVR32_ADCIFA.scr) \|= (1 << AVR32_ADCIFA_SCR_WM0))
	Window Monitor 0 : Ack the Window Monitor 0 Status Bit. More...

#define	ADCIFA_clear_window_1() ((AVR32_ADCIFA.scr) \|= (1 << AVR32_ADCIFA_SCR_WM1))
	Window Monitor 1 : Ack the Window Monitor 1 Status Bit. More...

#define	ADCIFA_CONFIGURATION_ACCEPTED 0x1
	This constant is used as return value for adcifa_configure and adcifa_configure_sequencer functions. More...

#define	ADCIFA_CONFIGURATION_REFUSED 0x0
	This constant is used as return value for adcifa_configure and adcifa_configure_sequencer functions. More...

#define	ADCIFA_configure_muxsel0n(m7, m6, m5, m4, m3, m2, m1, m0)
	Configuration of Mux Negative for Sequencer 0. More...

#define	ADCIFA_configure_muxsel0p(m7, m6, m5, m4, m3, m2, m1, m0)
	Configuration of Mux Positive for Sequencer 0. More...

#define	ADCIFA_configure_muxsel1n(m7, m6, m5, m4, m3, m2, m1, m0)
	Configuration of Mux Negative for Sequencer 1. More...

#define	ADCIFA_configure_muxsel1p(m7, m6, m5, m4, m3, m2, m1, m0)
	Configuration of Mux Positive for Sequencer 1. More...

#define	ADCIFA_configure_sequencer_0(cnvnb, sres, trgsel, socb, sh_mode, hwla, sa)
	Configuration of Sequencer 0. More...

#define	ADCIFA_configure_sequencer_1(cnvnb, sres, trgsel, socb, csws, hwla, sa)
	Configuration of Sequencer 1. More...

#define	ADCIFA_configure_sh0gain(g7, g6, g5, g4, g3, g2, g1, g0)
	Configuration of Gain for Sequencer 0. More...

#define	ADCIFA_configure_sh1gain(g7, g6, g5, g4, g3, g2, g1, g0)
	Configuration of Gain for Sequencer 1. More...

#define	ADCIFA_disable()
	Enable the ADCIFA. More...

#define	ADCIFA_enable()
	Enable the ADCIFA. More...

#define	ADCIFA_is_eoc_sequencer_0()
	Sequencer 0 : Check end of Conversion. More...

#define	ADCIFA_is_eoc_sequencer_1()
	Sequencer 1 : Check end of Conversion. More...

#define	ADCIFA_is_eos_sequencer_0()
	Sequencer 0 : Check end of Sequence. More...

#define	ADCIFA_is_eos_sequencer_1()
	Sequencer 1 : Check end of Sequence. More...

#define	ADCIFA_is_startup_time()
	Check Startup Time flag. More...

#define	ADCIFA_is_window_0_set()
	Window Monitor 0 : Check the Window Monitor 0 Status Bit. More...

#define	ADCIFA_is_window_1_set()
	Window Monitor 1 : Check the Window Monitor 1 Status Bit. More...

#define	ADCIFA_NONE 0xFF
	Parameter. More...

#define	ADCIFA_read_resx_sequencer_0(ind) ((int32_t)AVR32_ADCIFA.resx[(ind)])
	Return result for conversion for Sequencer 0. More...

#define	ADCIFA_read_resx_sequencer_1(ind) ((int)AVR32_ADCIFA.resx[(ind) + 8])
	Return result for conversion for Sequencer 1. More...

#define	ADCIFA_set_gain_calibration(gcal)
	Set Gain Calibration. More...

#define	ADCIFA_set_offset_calibration(ocal)
	Set Offset Calibration. More...

#define	ADCIFA_set_sh0_gain_calibration(scal)
	Set Sample & Hold Gain Calibration for Seq 0. More...

#define	ADCIFA_set_sh1_gain_calibration(scal)
	Set Sample & Hold Gain Calibration for Seq 0. More...

#define	ADCIFA_softsoc_sequencer(seq)

#define	ADCIFA_softsoc_sequencer_0() { AVR32_ADCIFA.cr = AVR32_ADCIFA_CR_SOC0_MASK; }
	Sequencer 0 : Software Start of Conversion. More...

#define	ADCIFA_softsoc_sequencer_1() { AVR32_ADCIFA.cr = AVR32_ADCIFA_CR_SOC1_MASK; }
	Sequencer 1 : Software Start of Conversion. More...

#define	ADCIFA_START_UP_TIME 1000
	ADCIFA Start-Up time (us) More...

#define	ADCIFA_STATUS_COMPLETED 0x2
	This constant is used as return value for the adcifa_get_values_from_sequencer function. More...

#define	ADCIFA_STATUS_NOT_COMPLETED 0x3
	This constant is used as return value for the adcifa_get_values_from_sequencer function. More...

#define	AVR32_FLASHC_FACTORY_PAGE_ADDRESS 0x80800200

#define	AVR32_FLASHC_FROW_GAIN0_MASK 0x000003FF

#define	AVR32_FLASHC_FROW_GAIN0_OFFSET 0

#define	AVR32_FLASHC_FROW_GAIN0_WORD 8

#define	AVR32_FLASHC_FROW_GAIN1_MASK 0x03FF0000

#define	AVR32_FLASHC_FROW_GAIN1_OFFSET 16

#define	AVR32_FLASHC_FROW_GAIN1_WORD 8

#define	AVR32_FLASHC_FROW_GCAL_MASK 0x00007FFF

#define	AVR32_FLASHC_FROW_GCAL_OFFSET 0

#define	AVR32_FLASHC_FROW_GCAL_WORD 4

#define	AVR32_FLASHC_FROW_OCAL_MASK 0x3F000000

#define	AVR32_FLASHC_FROW_OCAL_OFFSET 24

#define	AVR32_FLASHC_FROW_OCAL_WORD 4

Functions
void	adcifa_calibrate_offset (volatile avr32_adcifa_t adcifa, adcifa_opt_t p_adcifa_opt, uint32_t pb_hz)

bool	adcifa_check_eoc (volatile avr32_adcifa_t *adcifa, uint8_t sequencer)
	Get End of Conversion status bit. More...

bool	adcifa_check_eos (volatile avr32_adcifa_t *adcifa, uint8_t sequencer)
	Get End of Conversion status bit. More...

void	adcifa_clear_interrupt (volatile avr32_adcifa_t *adcifa, uint32_t interrupt_flags)
	Clear any ADCIFA interrupt. More...

uint8_t	adcifa_configure (volatile avr32_adcifa_t adcifa, adcifa_opt_t p_adcifa_opt, uint32_t pb_hz)
	Configure ADCIFA. More...

uint8_t	adcifa_configure_sequencer (volatile avr32_adcifa_t adcifa, uint8_t sequencer, adcifa_sequencer_opt_t p_adcifa_sequencer_opt, adcifa_sequencer_conversion_opt_t *p_adcifa_sequencer_conversion_opt)
	Configure ADCIFA specific sequencer. More...

void	adcifa_configure_window_monitor (volatile avr32_adcifa_t adcifa, uint8_t sequencer, adcifa_window_monitor_opt_t adc_window_monitor_opt)
	Configure ADCIFA specific window monitor. More...

void	adcifa_disable_interrupt (volatile avr32_adcifa_t *adcifa, uint32_t interrupt_flags)
	Disable any ADCIFA interrupt. More...

void	adcifa_enable_interrupt (volatile avr32_adcifa_t *adcifa, uint32_t interrupt_flags)
	Enable any ADCIFA interrupt. More...

void	adcifa_get_calibration_data (volatile avr32_adcifa_t adcifa, adcifa_opt_t p_adcifa_opt)
	Get ADCIFA Calibration Data. More...

uint8_t	adcifa_get_values_from_sequencer (volatile avr32_adcifa_t adcifa, uint8_t sequencer, adcifa_sequencer_opt_t p_adcifa_sequencer_opt, int16_t *adcifa_values)
	Get channel values for a specific sequence. More...

void	adcifa_start_itimer (volatile avr32_adcifa_t *adcifa, uint32_t timer_count)
	Start the ADCIFA timer. More...

void	adcifa_start_sequencer (volatile avr32_adcifa_t *adcifa, uint8_t sequencer)
	Start analog to digital conversion for a specific sequencer. More...

void	adcifa_stop_itimer (volatile avr32_adcifa_t *adcifa)
	Stop the ADCIFA timer. More...

Positive Inputs used by the ADC
#define	AVR32_ADCIFA_INP_ADCIN0 0

#define	AVR32_ADCIFA_INP_ADCIN1 1

#define	AVR32_ADCIFA_INP_ADCIN2 2

#define	AVR32_ADCIFA_INP_ADCIN3 3

#define	AVR32_ADCIFA_INP_ADCIN4 4

#define	AVR32_ADCIFA_INP_ADCIN5 5

#define	AVR32_ADCIFA_INP_ADCIN6 6

#define	AVR32_ADCIFA_INP_ADCIN7 7

#define	AVR32_ADCIFA_INP_DAC0_INT 8

#define	AVR32_ADCIFA_INP_TSENSE 9

#define	AVR32_ADCIFA_INP_GNDANA 10

Negative Inputs used by the ADC
#define	AVR32_ADCIFA_INN_ADCIN8 0

#define	AVR32_ADCIFA_INN_ADCIN9 1

#define	AVR32_ADCIFA_INN_ADCIN10 2

#define	AVR32_ADCIFA_INN_ADCIN11 3

#define	AVR32_ADCIFA_INN_ADCIN12 4

#define	AVR32_ADCIFA_INN_ADCIN13 5

#define	AVR32_ADCIFA_INN_ADCIN14 6

#define	AVR32_ADCIFA_INN_ADCIN15 7

#define	AVR32_ADCIFA_INN_DAC1_INT 8

#define	AVR32_ADCIFA_INN_GNDANA 9

References used by the ADC
#define	ADCIFA_REF1V 0x0 /** Internal 1V reference */

#define	ADCIFA_REF06VDD 0x1 /** Internal 0.6 x VDDANA reference */

#define	ADCIFA_ADCREF0 0x2 /** External 0 reference ADCREF0 */

#define	ADCIFA_ADCREF1 0x3 /** External 1 reference ADCREF1 */

#define	ADCIFA_ADCREF 0x10 /** External reference ADCREFP/ADCREFN */

Triggering Source used by the ADC
#define	ADCIFA_TRGSEL_SOFT 0x0 /** Trigger Source Software */

#define	ADCIFA_TRGSEL_ITIMER 0x1 /** Trigger Source Timer */

#define	ADCIFA_TRGSEL_EVT 0x2 /** Trigger Source Event */

#define	ADCIFA_TRGSEL_CONTINUOUS 0x3 /** Trigger Source Continuous */

Resolution selected by the ADC
#define	ADCIFA_SRES_8B 0x2 /** Resolution 8-Bits */

#define	ADCIFA_SRES_10B 0x1 /** Resolution 10-Bits */

#define	ADCIFA_SRES_12B 0x0 /** Resolution 12-Bits */

Gain selected on a Conversion by the ADC
#define	ADCIFA_SHG_1 0x0 /** Gain Conversion = 1 */

#define	ADCIFA_SHG_2 0x1 /** Gain Conversion = 2 */

#define	ADCIFA_SHG_4 0x2 /** Gain Conversion = 4 */

#define	ADCIFA_SHG_8 0x3 /** Gain Conversion = 8 */

#define	ADCIFA_SHG_16 0x4 /** Gain Conversion = 16 */

#define	ADCIFA_SHG_32 0x5 /** Gain Conversion = 32 */

#define	ADCIFA_SHG_64 0x6 /** Gain Conversion = 64 */

Conversion Management of the Sequence
#define	ADCIFA_SOCB_ALLSEQ

#define	ADCIFA_SOCB_SINGLECONV

Sampling Mode (OVSX2 & SHDYN)
#define	ADCIFA_SH_MODE_STANDARD 0x0 /** No dynamic over sampling */

#define	ADCIFA_SH_MODE_OVERSAMP 0x1 /** Over sampling: OVSX2 = 1 */

#define	ADCIFA_SH_MODE_DYNAMIC 0x2 /** Dynamic: SHDYN = 1 */

Half Word Left Adjustment (HWLA)
#define	ADCIFA_HWLA_NOADJ 0x0 /** Disable the HWLA mode */

#define	ADCIFA_HWLA_LEFTADJ 0x1 /** Enable the HWLA mode */

Software Acknowledge (SA)
#define	ADCIFA_SA_EOS_SOFTACK 0x0 /** Disable the SA mode */

#define	ADCIFA_SA_NO_EOS_SOFTACK 0x1 /** Enable the SA mode */

Sequence numbers
#define	ADCIFA_SEQ0 0x0

#define	ADCIFA_SEQ1 0x1

#define	ADCIFA_SEQ0_SEQ1 0x3

Window monitor
#define	ADCIFA_WINDOW_MODE_NONE 0 /** No Window Mode : Default */

#define	ADCIFA_WINDOW_MODE_BELOW 1 /** Active : Result < High Threshold */

#define	ADCIFA_WINDOW_MODE_ABOVE 2 /** Active : Result > Low Threshold */

#define	ADCIFA_WINDOW_MODE_INSIDE 3 /** Active : Low Threshold < Result < High Threshold */

#define	ADCIFA_WINDOW_MODE_OUTSIDE 4 /** Active : Result >= Low Threshold or Result >= High Threshold */

#define ADCIFA_ADCREF 0x10 /** External reference ADCREFP/ADCREFN */

#define ADCIFA_ADCREF0 0x2 /** External 0 reference ADCREF0 */

#define ADCIFA_ADCREF1 0x3 /** External 1 reference ADCREF1 */

#define ADCIFA_clear_eoc_sequencer_0 ( ) ((AVR32_ADCIFA.scr) |= (1 << AVR32_ADCIFA_SCR_SEOC0))

Sequencer 0 : Ack end of Conversion.

#define ADCIFA_clear_eoc_sequencer_1 ( ) ((AVR32_ADCIFA.scr) |= (1 << AVR32_ADCIFA_SCR_SEOC1)

Sequencer 1 : Ack end of Conversion.

#define ADCIFA_clear_eos_sequencer_0 ( ) ((AVR32_ADCIFA.scr) |= (1 << AVR32_ADCIFA_SCR_SEOS0))

Sequencer 0 : Ack end of Sequence.

#define ADCIFA_clear_eos_sequencer_1 ( ) ((AVR32_ADCIFA.scr) |= (1 << AVR32_ADCIFA_SCR_SEOS1))

Sequencer 1 : Ack end of Sequence.

#define ADCIFA_clear_window_0 ( ) ((AVR32_ADCIFA.scr) |= (1 << AVR32_ADCIFA_SCR_WM0))

Window Monitor 0 : Ack the Window Monitor 0 Status Bit.

#define ADCIFA_clear_window_1 ( ) ((AVR32_ADCIFA.scr) |= (1 << AVR32_ADCIFA_SCR_WM1))

Window Monitor 1 : Ack the Window Monitor 1 Status Bit.

#define ADCIFA_CONFIGURATION_ACCEPTED 0x1

This constant is used as return value for adcifa_configure and adcifa_configure_sequencer functions.

Referenced by adcifa_configure(), and adcifa_configure_sequencer().

#define ADCIFA_CONFIGURATION_REFUSED 0x0

This constant is used as return value for adcifa_configure and adcifa_configure_sequencer functions.

#define ADCIFA_configure_muxsel0n	(	m7,
		m6,
		m5,
		m4,
		m3,
		m2,
		m1,
		m0
	)

Value:

{ \
        AVR32_ADCIFA.innsel10 \
            = ((m7) << AVR32_ADCIFA_INNSEL10_CNV7_OFFSET) | \
                ((m6) << AVR32_ADCIFA_INNSEL10_CNV6_OFFSET) | \
                ((m5) << AVR32_ADCIFA_INNSEL10_CNV5_OFFSET) | \
                ((m4) << AVR32_ADCIFA_INNSEL10_CNV4_OFFSET); \
        AVR32_ADCIFA.innsel00 \
            = ((m3) << AVR32_ADCIFA_INNSEL00_CNV3_OFFSET) | \
                ((m2) << AVR32_ADCIFA_INNSEL00_CNV2_OFFSET) | \
                ((m1) << AVR32_ADCIFA_INNSEL00_CNV1_OFFSET) | \
                ((m0) << AVR32_ADCIFA_INNSEL00_CNV0_OFFSET); \
}

Configuration of Mux Negative for Sequencer 0.

m(x) : ADC Channel for element x of Sequencer 0

Referenced by adcifa_configure_sequencer().

#define ADCIFA_configure_muxsel0p	(	m7,
		m6,
		m5,
		m4,
		m3,
		m2,
		m1,
		m0
	)

Value:

{ \
        AVR32_ADCIFA.inpsel10 \
            = ((m7) << AVR32_ADCIFA_INNSEL10_CNV7_OFFSET) | \
                ((m6) << AVR32_ADCIFA_INNSEL10_CNV6_OFFSET) | \
                ((m5) << AVR32_ADCIFA_INNSEL10_CNV5_OFFSET) | \
                ((m4) << AVR32_ADCIFA_INNSEL10_CNV4_OFFSET); \
        AVR32_ADCIFA.inpsel00 \
            = ((m3) << AVR32_ADCIFA_INNSEL00_CNV3_OFFSET) | \
                ((m2) << AVR32_ADCIFA_INNSEL00_CNV2_OFFSET) | \
                ((m1) << AVR32_ADCIFA_INNSEL00_CNV1_OFFSET) | \
                ((m0) << AVR32_ADCIFA_INNSEL00_CNV0_OFFSET); \
    }

Configuration of Mux Positive for Sequencer 0.

m(x) : ADC Channel for element x of Sequencer 0

Referenced by adcifa_configure_sequencer().

#define ADCIFA_configure_muxsel1n	(	m7,
		m6,
		m5,
		m4,
		m3,
		m2,
		m1,
		m0
	)

Value:

{ \
        AVR32_ADCIFA.innsel11 \
            = ((m7) << \
                AVR32_ADCIFA_INNSEL10_CNV7_OFFSET) | \
                ((m6) << \
                AVR32_ADCIFA_INNSEL10_CNV6_OFFSET) | \
                ((m5) << \
                AVR32_ADCIFA_INNSEL10_CNV5_OFFSET) | \
                ((m4) << AVR32_ADCIFA_INNSEL10_CNV4_OFFSET); \
        AVR32_ADCIFA.innsel01 \
            = ((m3) << \
                AVR32_ADCIFA_INNSEL00_CNV3_OFFSET) | \
                ((m2) << \
                AVR32_ADCIFA_INNSEL00_CNV2_OFFSET) | \
                ((m1) << \
                AVR32_ADCIFA_INNSEL00_CNV1_OFFSET) | \
                ((m0) << AVR32_ADCIFA_INNSEL00_CNV0_OFFSET); \
    }

Configuration of Mux Negative for Sequencer 1.

m(x) : ADC Channel for element x of Sequencer 1

Referenced by adcifa_configure_sequencer().

#define ADCIFA_configure_muxsel1p	(	m7,
		m6,
		m5,
		m4,
		m3,
		m2,
		m1,
		m0
	)

Value:

{ \
        AVR32_ADCIFA.inpsel11 \
            = ((m7) << \
                AVR32_ADCIFA_INNSEL10_CNV7_OFFSET) | \
                ((m6) << \
                AVR32_ADCIFA_INNSEL10_CNV6_OFFSET) | \
                ((m5) << \
                AVR32_ADCIFA_INNSEL10_CNV5_OFFSET) | \
                ((m4) << AVR32_ADCIFA_INNSEL10_CNV4_OFFSET); \
        AVR32_ADCIFA.inpsel01 \
            = ((m3) << \
                AVR32_ADCIFA_INNSEL00_CNV3_OFFSET) | \
                ((m2) << \
                AVR32_ADCIFA_INNSEL00_CNV2_OFFSET) | \
                ((m1) << \
                AVR32_ADCIFA_INNSEL00_CNV1_OFFSET) | \
                ((m0) << AVR32_ADCIFA_INNSEL00_CNV0_OFFSET); \
    }

Configuration of Mux Positive for Sequencer 1.

m(x) : ADC Channel for element x of Sequencer 1

Referenced by adcifa_configure_sequencer().

#define ADCIFA_configure_sequencer_0	(	cnvnb,
		sres,
		trgsel,
		socb,
		sh_mode,
		hwla,
		sa
	)

Value:

{ \
        AVR32_ADCIFA.seqcfg0 \
            = ((cnvnb << AVR32_ADCIFA_SEQCFG0_CNVNB) | \
                (sres << AVR32_ADCIFA_SEQCFG0_SRES) | \
                (trgsel << AVR32_ADCIFA_SEQCFG0_TRGSEL) | \
                (socb << AVR32_ADCIFA_SEQCFG0_SOCB) | \
                (sh_mode << AVR32_ADCIFA_SEQCFG0_OVSX2) | \
                (hwla << AVR32_ADCIFA_SEQCFG0_HWLA) | \
                (sa << AVR32_ADCIFA_SEQCFG0_SA)); \
    }

Configuration of Sequencer 0.

cnvb : Number of conversion sres : ADCIFA Resolution trgsel : Trigger Selection socb : Start of Conversion Selection csws : CSWS Mode Selection hwla : HWLA Mode Selection sa : SA Mode Selection

Referenced by adcifa_configure_sequencer().

#define ADCIFA_configure_sequencer_1	(	cnvnb,
		sres,
		trgsel,
		socb,
		csws,
		hwla,
		sa
	)

Value:

{ \
        AVR32_ADCIFA.seqcfg1 \
            = ((cnvnb << AVR32_ADCIFA_SEQCFG1_CNVNB)    | \
                (sres << AVR32_ADCIFA_SEQCFG1_SRES)     | \
                (trgsel << AVR32_ADCIFA_SEQCFG1_TRGSEL) | \
                (socb << AVR32_ADCIFA_SEQCFG1_SOCB)     | \
                (csws << AVR32_ADCIFA_SEQCFG1_OVSX2)    | \
                (hwla << AVR32_ADCIFA_SEQCFG1_HWLA)     | \
                (1 << AVR32_ADCIFA_SEQCFG1_SHDYN)       | \
                (sa << AVR32_ADCIFA_SEQCFG1_SA)); \
    }

Configuration of Sequencer 1.

cnvb : Number of conversion sres : ADCIFA Resolution trgsel : Trigger Selection socb : Start of Conversion Selection csws : CSWS Mode Selection hwla : HWLA Mode Selection sa : SA Mode Selection

Referenced by adcifa_configure_sequencer().

#define ADCIFA_configure_sh0gain	(	g7,
		g6,
		g5,
		g4,
		g3,
		g2,
		g1,
		g0
	)

Value:

{ \
        AVR32_ADCIFA.shg0 \
            = ((g7) << AVR32_ADCIFA_GCNV7_OFFSET) | \
                ((g6) << AVR32_ADCIFA_GCNV6_OFFSET)  | \
                ((g5) <<  AVR32_ADCIFA_GCNV5_OFFSET) | \
                ((g4) << AVR32_ADCIFA_GCNV4_OFFSET) | \
                ((g3) << AVR32_ADCIFA_GCNV3_OFFSET) | \
                ((g2) <<  AVR32_ADCIFA_GCNV2_OFFSET) | \
                ((g1) << AVR32_ADCIFA_GCNV1_OFFSET) | \
                ((g0) << AVR32_ADCIFA_GCNV0_OFFSET); \
    }

Configuration of Gain for Sequencer 0.

g(x) : Gain for element x of Sequencer 0

Referenced by adcifa_configure_sequencer().

#define ADCIFA_configure_sh1gain	(	g7,
		g6,
		g5,
		g4,
		g3,
		g2,
		g1,
		g0
	)

Value:

{   AVR32_ADCIFA.shg1 \
            = ((g7) << \
                AVR32_ADCIFA_GCNV7_OFFSET) \
                | \
                ((g6) << \
                AVR32_ADCIFA_GCNV6_OFFSET) \
                | \
                ((g5) << \
                AVR32_ADCIFA_GCNV5_OFFSET) \
                | \
                ((g4) << \
                AVR32_ADCIFA_GCNV4_OFFSET) \
                | \
                ((g3) << \
                AVR32_ADCIFA_GCNV3_OFFSET) \
                | \
                ((g2) << \
                AVR32_ADCIFA_GCNV2_OFFSET) \
                | \
                ((g1) << \
                AVR32_ADCIFA_GCNV1_OFFSET) \
                | \
                ((g0) << \
                AVR32_ADCIFA_GCNV0_OFFSET); \
    }

Configuration of Gain for Sequencer 1.

g(x) : Gain for element x of Sequencer 1

Referenced by adcifa_configure_sequencer().

#define ADCIFA_disable ( )

Value:

{ \
        AVR32_ADCIFA.cfg  &= ~(1 << AVR32_ADCIFA_CFG_ADCEN); \
    }

Enable the ADCIFA.

#define ADCIFA_enable ( )

Value:

{ \
        AVR32_ADCIFA.cfg \
            |= (1 << AVR32_ADCIFA_CFG_ADCEN); \
    }

Enable the ADCIFA.

Referenced by adcifa_configure().

#define ADCIFA_HWLA_LEFTADJ 0x1 /** Enable the HWLA mode */

#define ADCIFA_HWLA_NOADJ 0x0 /** Disable the HWLA mode */

Referenced by adcifa_calibrate_offset().

#define ADCIFA_is_eoc_sequencer_0 ( )

Value:

(((AVR32_ADCIFA.sr) & (1 << AVR32_ADCIFA_SR_SEOC0)) == \

(1 << AVR32_ADCIFA_SR_SEOC0))

Sequencer 0 : Check end of Conversion.

Referenced by adcifa_check_eoc().

#define ADCIFA_is_eoc_sequencer_1 ( )

Value:

(((AVR32_ADCIFA.sr) & (1 << AVR32_ADCIFA_SR_SEOC1)) == \

(1 << AVR32_ADCIFA_SR_SEOC1))

Sequencer 1 : Check end of Conversion.

Referenced by adcifa_check_eoc().

#define ADCIFA_is_eos_sequencer_0 ( )

Value:

(((AVR32_ADCIFA.sr) & (1 << AVR32_ADCIFA_SR_SEOS0)) == \

(1 << AVR32_ADCIFA_SR_SEOS0))

Sequencer 0 : Check end of Sequence.

Referenced by adcifa_calibrate_offset(), and adcifa_check_eos().

#define ADCIFA_is_eos_sequencer_1 ( )

Value:

(((AVR32_ADCIFA.sr) & (1 << AVR32_ADCIFA_SR_SEOS1)) == \

(1 << AVR32_ADCIFA_SR_SEOS1))

Sequencer 1 : Check end of Sequence.

Referenced by adcifa_check_eos().

#define ADCIFA_is_startup_time ( )

Value:

(((AVR32_ADCIFA.sr) & (1 << AVR32_ADCIFA_SR_SUTD)) == \

(1 << AVR32_ADCIFA_SR_SUTD))

Check Startup Time flag.

Referenced by adcifa_configure().

#define ADCIFA_is_window_0_set ( )

Value:

(((AVR32_ADCIFA.sr) & (1 << AVR32_ADCIFA_SR_WM0)) == \

(1 << AVR32_ADCIFA_SR_WM0))

Window Monitor 0 : Check the Window Monitor 0 Status Bit.

#define ADCIFA_is_window_1_set ( )

Value:

(((AVR32_ADCIFA.sr) & (1 << AVR32_ADCIFA_SR_WM1)) == \

(1 << AVR32_ADCIFA_SR_WM1))

Window Monitor 1 : Check the Window Monitor 1 Status Bit.

#define ADCIFA_NONE 0xFF

Parameter.

#define ADCIFA_read_resx_sequencer_0 ( ind ) ((int32_t)AVR32_ADCIFA.resx[(ind)])

Return result for conversion for Sequencer 0.

ind : Index on element of Sequencer 0

Referenced by adcifa_calibrate_offset(), adcifa_get_values_from_sequencer(), and rtouch_get_adc_value().

#define ADCIFA_read_resx_sequencer_1 ( ind ) ((int)AVR32_ADCIFA.resx[(ind) + 8])

Return result for conversion for Sequencer 1.

Referenced by adcifa_get_values_from_sequencer().

#define ADCIFA_REF06VDD 0x1 /** Internal 0.6 x VDDANA reference */

#define ADCIFA_REF1V 0x0 /** Internal 1V reference */

#define ADCIFA_SA_EOS_SOFTACK 0x0 /** Disable the SA mode */

#define ADCIFA_SA_NO_EOS_SOFTACK 0x1 /** Enable the SA mode */

Referenced by adcifa_calibrate_offset().

#define ADCIFA_SEQ0 0x0

Referenced by adcifa_start_sequencer().

#define ADCIFA_SEQ0_SEQ1 0x3

Referenced by adcifa_start_sequencer().

#define ADCIFA_SEQ1 0x1

Referenced by adcifa_start_sequencer().

#define ADCIFA_set_gain_calibration ( gcal )

Value:

{ \
        AVR32_ADCIFA.adccal = \
        ((AVR32_ADCIFA.adccal & ~AVR32_ADCIFA_ADCCAL_GCAL_MASK) | \
        (((gcal)<<AVR32_ADCIFA_ADCCAL_GCAL) & AVR32_ADCIFA_ADCCAL_GCAL_MASK)); \
    }

Set Gain Calibration.

Referenced by adcifa_configure().

#define ADCIFA_set_offset_calibration ( ocal )

Value:

{ \
        AVR32_ADCIFA.adccal =  \
            ((AVR32_ADCIFA.adccal & ~AVR32_ADCIFA_ADCCAL_OCAL_MASK)|\
            (((ocal) << AVR32_ADCIFA_ADCCAL_OCAL) & \
                AVR32_ADCIFA_ADCCAL_OCAL_MASK)); \
    }

Set Offset Calibration.

Referenced by adcifa_configure().

#define ADCIFA_set_sh0_gain_calibration ( scal )

Value:

{ \
        AVR32_ADCIFA.shcal = \
        ((AVR32_ADCIFA.shcal & ~AVR32_ADCIFA_SHCAL_GAIN0_MASK) | \
        (((scal)<<AVR32_ADCIFA_SHCAL_GAIN0) & AVR32_ADCIFA_SHCAL_GAIN0_MASK)); \
    }

Set Sample & Hold Gain Calibration for Seq 0.

Referenced by adcifa_configure().

#define ADCIFA_set_sh1_gain_calibration ( scal )

Value:

{ \
        AVR32_ADCIFA.shcal = \
        ((AVR32_ADCIFA.shcal & ~AVR32_ADCIFA_SHCAL_GAIN1_MASK) | \
        (((scal)<<AVR32_ADCIFA_SHCAL_GAIN1) & AVR32_ADCIFA_SHCAL_GAIN1_MASK)); \
    }

Set Sample & Hold Gain Calibration for Seq 0.

Referenced by adcifa_configure().

#define ADCIFA_SH_MODE_DYNAMIC 0x2 /** Dynamic: SHDYN = 1 */

#define ADCIFA_SH_MODE_OVERSAMP 0x1 /** Over sampling: OVSX2 = 1 */

Referenced by adcifa_calibrate_offset().

#define ADCIFA_SH_MODE_STANDARD 0x0 /** No dynamic over sampling */

#define ADCIFA_SHG_1 0x0 /** Gain Conversion = 1 */

Referenced by adcifa_calibrate_offset(), and rtouch_start_read().

#define ADCIFA_SHG_16 0x4 /** Gain Conversion = 16 */

#define ADCIFA_SHG_2 0x1 /** Gain Conversion = 2 */

#define ADCIFA_SHG_32 0x5 /** Gain Conversion = 32 */

#define ADCIFA_SHG_4 0x2 /** Gain Conversion = 4 */

#define ADCIFA_SHG_64 0x6 /** Gain Conversion = 64 */

#define ADCIFA_SHG_8 0x3 /** Gain Conversion = 8 */

#define ADCIFA_SOCB_ALLSEQ

Value:

0x0

Referenced by adcifa_calibrate_offset().

#define ADCIFA_SOCB_SINGLECONV

Value:

0x1

#define ADCIFA_softsoc_sequencer ( seq )

Value:

{ \
        AVR32_ADCIFA.cr = (seq); \
    }

Referenced by adcifa_start_sequencer().

#define ADCIFA_softsoc_sequencer_0 ( ) { AVR32_ADCIFA.cr = AVR32_ADCIFA_CR_SOC0_MASK; }

Sequencer 0 : Software Start of Conversion.

#define ADCIFA_softsoc_sequencer_1 ( ) { AVR32_ADCIFA.cr = AVR32_ADCIFA_CR_SOC1_MASK; }

Sequencer 1 : Software Start of Conversion.

#define ADCIFA_SRES_10B 0x1 /** Resolution 10-Bits */

#define ADCIFA_SRES_12B 0x0 /** Resolution 12-Bits */

Referenced by adcifa_calibrate_offset().

#define ADCIFA_SRES_8B 0x2 /** Resolution 8-Bits */

#define ADCIFA_START_UP_TIME 1000

ADCIFA Start-Up time (us)

Referenced by adcifa_configure().

#define ADCIFA_STATUS_COMPLETED 0x2

This constant is used as return value for the adcifa_get_values_from_sequencer function.

Referenced by adcifa_get_values_from_sequencer().

#define ADCIFA_STATUS_NOT_COMPLETED 0x3

This constant is used as return value for the adcifa_get_values_from_sequencer function.

Referenced by adcifa_get_values_from_sequencer().

#define ADCIFA_TRGSEL_CONTINUOUS 0x3 /** Trigger Source Continuous */

#define ADCIFA_TRGSEL_EVT 0x2 /** Trigger Source Event */

#define ADCIFA_TRGSEL_ITIMER 0x1 /** Trigger Source Timer */

#define ADCIFA_TRGSEL_SOFT 0x0 /** Trigger Source Software */

Referenced by adcifa_calibrate_offset().

#define ADCIFA_WINDOW_MODE_ABOVE 2 /** Active : Result > Low Threshold */

#define ADCIFA_WINDOW_MODE_BELOW 1 /** Active : Result < High Threshold */

#define ADCIFA_WINDOW_MODE_INSIDE 3 /** Active : Low Threshold < Result < High Threshold */

#define ADCIFA_WINDOW_MODE_NONE 0 /** No Window Mode : Default */

#define ADCIFA_WINDOW_MODE_OUTSIDE 4 /** Active : Result >= Low Threshold or Result >= High Threshold */

#define AVR32_ADCIFA_INN_ADCIN10 2

#define AVR32_ADCIFA_INN_ADCIN11 3

#define AVR32_ADCIFA_INN_ADCIN12 4

#define AVR32_ADCIFA_INN_ADCIN13 5

#define AVR32_ADCIFA_INN_ADCIN14 6

#define AVR32_ADCIFA_INN_ADCIN15 7

#define AVR32_ADCIFA_INN_ADCIN8 0

#define AVR32_ADCIFA_INN_ADCIN9 1

#define AVR32_ADCIFA_INN_DAC1_INT 8

#define AVR32_ADCIFA_INN_GNDANA 9

Referenced by adcifa_calibrate_offset(), and rtouch_start_read().

#define AVR32_ADCIFA_INP_ADCIN0 0

#define AVR32_ADCIFA_INP_ADCIN1 1

#define AVR32_ADCIFA_INP_ADCIN2 2

#define AVR32_ADCIFA_INP_ADCIN3 3

#define AVR32_ADCIFA_INP_ADCIN4 4

#define AVR32_ADCIFA_INP_ADCIN5 5

#define AVR32_ADCIFA_INP_ADCIN6 6

#define AVR32_ADCIFA_INP_ADCIN7 7

#define AVR32_ADCIFA_INP_DAC0_INT 8

#define AVR32_ADCIFA_INP_GNDANA 10

Referenced by adcifa_calibrate_offset(), and rtouch_start_read().

#define AVR32_ADCIFA_INP_TSENSE 9

#define AVR32_FLASHC_FACTORY_PAGE_ADDRESS 0x80800200

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GAIN0_MASK 0x000003FF

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GAIN0_OFFSET 0

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GAIN0_WORD 8

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GAIN1_MASK 0x03FF0000

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GAIN1_OFFSET 16

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GAIN1_WORD 8

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GCAL_MASK 0x00007FFF

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GCAL_OFFSET 0

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_GCAL_WORD 4

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_OCAL_MASK 0x3F000000

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_OCAL_OFFSET 24

Referenced by adcifa_get_calibration_data().

#define AVR32_FLASHC_FROW_OCAL_WORD 4

Referenced by adcifa_get_calibration_data().

void adcifa_calibrate_offset	(	volatile avr32_adcifa_t *	adcifa,
		adcifa_opt_t *	p_adcifa_opt,
		uint32_t	pb_hz
	)

References adcifa_configure(), adcifa_configure_sequencer(), ADCIFA_HWLA_NOADJ, ADCIFA_is_eos_sequencer_0, ADCIFA_read_resx_sequencer_0, ADCIFA_SA_NO_EOS_SOFTACK, ADCIFA_SH_MODE_OVERSAMP, ADCIFA_SHG_1, ADCIFA_SOCB_ALLSEQ, ADCIFA_SRES_12B, adcifa_start_sequencer(), ADCIFA_TRGSEL_SOFT, AVR32_ADCIFA_INN_GNDANA, AVR32_ADCIFA_INP_GNDANA, CALIBRATION_ADCIFA_NUMBER_OF_SEQUENCE, adcifa_sequencer_conversion_opt_t::channel_n, adcifa_sequencer_conversion_opt_t::channel_p, adcifa_sequencer_opt_t::convnb, adcifa_opt_t::free_running_mode_enable, adcifa_sequencer_conversion_opt_t::gain, adcifa_sequencer_opt_t::half_word_adjustment, adcifa_opt_t::mux_settle_more_time, adcifa_opt_t::offset_calibration_value, adcifa_sequencer_opt_t::resolution, adcifa_opt_t::sample_and_hold_disable, adcifa_sequencer_opt_t::sh_mode, adcifa_opt_t::single_sequencer_mode, adcifa_opt_t::sleep_mode_enable, adcifa_sequencer_opt_t::software_acknowledge, adcifa_sequencer_opt_t::start_of_conversion, and adcifa_sequencer_opt_t::trigger_selection.

bool adcifa_check_eoc	(	volatile avr32_adcifa_t *	adcifa,
		uint8_t	sequencer
	)

Get End of Conversion status bit.

Parameters

adcifa	Base address of the ADCIFA
sequencer	Sequencer index

References ADCIFA_is_eoc_sequencer_0, ADCIFA_is_eoc_sequencer_1, and Assert.

bool adcifa_check_eos	(	volatile avr32_adcifa_t *	adcifa,
		uint8_t	sequencer
	)

Get End of Conversion status bit.

Parameters

adcifa	Base address of the ADCIFA
sequencer	Sequencer index

References ADCIFA_is_eos_sequencer_0, ADCIFA_is_eos_sequencer_1, and Assert.

Referenced by adcifa_get_values_from_sequencer().

void adcifa_clear_interrupt	(	volatile avr32_adcifa_t *	adcifa,
		uint32_t	interrupt_flags
	)

Clear any ADCIFA interrupt.

Parameters

*adcifa	Base address of the ADCIFA
interrupt_flags	Interrupt mask

uint8_t adcifa_configure	(	volatile avr32_adcifa_t *	adcifa,
		adcifa_opt_t *	p_adcifa_opt,
		uint32_t	pb_hz
	)

Configure ADCIFA.

Mandatory to call.

If not called, ADC channels will have side effects

Parameters

adcifa	Base address of the ADCIFA
p_adcifa_opt	Structure for the ADCIFA core configuration
pb_hz	Peripheral Bus frequency

Returns: ADCIFA_CONFIGURATION_REFUSED or ADCIFA_CONFIGURATION_ACCEPTED

References ADCIFA_CONFIGURATION_ACCEPTED, ADCIFA_enable, ADCIFA_is_startup_time, ADCIFA_set_gain_calibration, ADCIFA_set_offset_calibration, ADCIFA_set_sh0_gain_calibration, ADCIFA_set_sh1_gain_calibration, ADCIFA_START_UP_TIME, Assert, adcifa_opt_t::free_running_mode_enable, adcifa_opt_t::frequency, adcifa_opt_t::gain_calibration_value, adcifa_opt_t::mux_settle_more_time, adcifa_opt_t::offset_calibration_value, adcifa_opt_t::reference_source, adcifa_opt_t::sample_and_hold_disable, adcifa_opt_t::sh0_calibration_value, adcifa_opt_t::sh1_calibration_value, adcifa_opt_t::single_sequencer_mode, and adcifa_opt_t::sleep_mode_enable.

Referenced by adcifa_calibrate_offset(), and rtouch_prepare_adc().

uint8_t adcifa_configure_sequencer	(	volatile avr32_adcifa_t *	adcifa,
		uint8_t	sequencer,
		adcifa_sequencer_opt_t *	p_adcifa_sequencer_opt,
		adcifa_sequencer_conversion_opt_t *	p_adcifa_sequencer_conversion_opt
	)

Configure ADCIFA specific sequencer.

    - Sequence, Gain and Mux

Parameters

adcifa	Base address of the ADCIFA
sequencer	Sequencer index
p_adcifa_sequencer_opt	Structure for the sequencer configuration
p_adcifa_sequencer_conversion_opt	Pointer on a buffer for each conversion on a sequencer

Returns: ADCIFA_CONFIGURATION_REFUSED or ADCIFA_CONFIGURATION_ACCEPTED

References ADCIFA_CONFIGURATION_ACCEPTED, ADCIFA_configure_muxsel0n, ADCIFA_configure_muxsel0p, ADCIFA_configure_muxsel1n, ADCIFA_configure_muxsel1p, ADCIFA_configure_sequencer_0, ADCIFA_configure_sequencer_1, ADCIFA_configure_sh0gain, ADCIFA_configure_sh1gain, adcifa_seq1_configured, Assert, adcifa_sequencer_conversion_opt_t::channel_n, adcifa_sequencer_conversion_opt_t::channel_p, adcifa_sequencer_opt_t::convnb, adcifa_sequencer_conversion_opt_t::gain, adcifa_sequencer_opt_t::half_word_adjustment, adcifa_sequencer_opt_t::resolution, adcifa_sequencer_opt_t::sh_mode, adcifa_sequencer_opt_t::software_acknowledge, adcifa_sequencer_opt_t::start_of_conversion, and adcifa_sequencer_opt_t::trigger_selection.

Referenced by adcifa_calibrate_offset(), and rtouch_start_read().

void adcifa_configure_window_monitor	(	volatile avr32_adcifa_t *	adcifa,
		uint8_t	sequencer,
		adcifa_window_monitor_opt_t *	adc_window_monitor_opt
	)

Configure ADCIFA specific window monitor.

Parameters

adcifa	Base address of the ADCIFA
sequencer	Sequencer index
adc_window_monitor_opt	Structure for the sequencer configuration

References adcifa_window_monitor_opt_t::high_threshold, adcifa_window_monitor_opt_t::low_threshold, adcifa_window_monitor_opt_t::mode, and adcifa_window_monitor_opt_t::source_index.

void adcifa_disable_interrupt	(	volatile avr32_adcifa_t *	adcifa,
		uint32_t	interrupt_flags
	)

Disable any ADCIFA interrupt.

Parameters

adcifa	Base address of the ADCIFA
interrupt_flags	Interrupt mask

void adcifa_enable_interrupt	(	volatile avr32_adcifa_t *	adcifa,
		uint32_t	interrupt_flags
	)

Enable any ADCIFA interrupt.

Parameters

adcifa	Base address of the ADCIFA
interrupt_flags	Interrupt mask

void adcifa_get_calibration_data	(	volatile avr32_adcifa_t *	adcifa,
		adcifa_opt_t *	p_adcifa_opt
	)

Get ADCIFA Calibration Data.

Mandatory to call if factory calibration data are wanted to be used. If not called, Calibration Data should be set by the application.

Parameters

adcifa	Base address of the ADCIFA
p_adcifa_opt	Structure for the ADCIFA core configuration

References AVR32_FLASHC_FACTORY_PAGE_ADDRESS, AVR32_FLASHC_FROW_GAIN0_MASK, AVR32_FLASHC_FROW_GAIN0_OFFSET, AVR32_FLASHC_FROW_GAIN0_WORD, AVR32_FLASHC_FROW_GAIN1_MASK, AVR32_FLASHC_FROW_GAIN1_OFFSET, AVR32_FLASHC_FROW_GAIN1_WORD, AVR32_FLASHC_FROW_GCAL_MASK, AVR32_FLASHC_FROW_GCAL_OFFSET, AVR32_FLASHC_FROW_GCAL_WORD, AVR32_FLASHC_FROW_OCAL_MASK, AVR32_FLASHC_FROW_OCAL_OFFSET, AVR32_FLASHC_FROW_OCAL_WORD, adcifa_opt_t::gain_calibration_value, adcifa_opt_t::offset_calibration_value, adcifa_opt_t::sh0_calibration_value, and adcifa_opt_t::sh1_calibration_value.

uint8_t adcifa_get_values_from_sequencer	(	volatile avr32_adcifa_t *	adcifa,
		uint8_t	sequencer,
		adcifa_sequencer_opt_t *	p_adcifa_sequencer_opt,
		int16_t *	adcifa_values
	)

Get channel values for a specific sequence.

Parameters

adcifa	Base address of the ADCIFA
sequencer	Sequencer index
p_adcifa_sequencer_opt	Structure for the sequencer configuration
adcifa_values	Pointer on the converter values

Returns: ADCIFA_STATUS_COMPLETED or ADCIFA_STATUS_NOT_COMPLETED

References adcifa_check_eos(), ADCIFA_read_resx_sequencer_0, ADCIFA_read_resx_sequencer_1, ADCIFA_STATUS_COMPLETED, ADCIFA_STATUS_NOT_COMPLETED, Assert, and adcifa_sequencer_opt_t::convnb.

void adcifa_start_itimer	(	volatile avr32_adcifa_t *	adcifa,
		uint32_t	timer_count
	)

Start the ADCIFA timer.

Parameters

adcifa	Base address of the ADCIFA
timer_count	Fs = Fadc / (timer_counter + 1)

void adcifa_start_sequencer	(	volatile avr32_adcifa_t *	adcifa,
		uint8_t	sequencer
	)

Start analog to digital conversion for a specific sequencer.

Parameters

adcifa	Base address of the ADCIFA
sequencer	Sequencer index

References ADCIFA_SEQ0, ADCIFA_SEQ0_SEQ1, ADCIFA_SEQ1, ADCIFA_softsoc_sequencer, and Assert.

Referenced by adcifa_calibrate_offset(), and rtouch_start_read().

void adcifa_stop_itimer ( volatile avr32_adcifa_t * adcifa )

Stop the ADCIFA timer.

Parameters

adcifa Base address of the ADCIFA

Microchip® Advanced Software Framework

Data Structures

Macros

Functions

Positive Inputs used by the ADC

Negative Inputs used by the ADC

References used by the ADC

Triggering Source used by the ADC

Resolution selected by the ADC

Gain selected on a Conversion by the ADC

Conversion Management of the Sequence

Sampling Mode (OVSX2 & SHDYN)

Half Word Left Adjustment (HWLA)

Software Acknowledge (SA)

Sequence numbers

Window monitor