This module contains WILC ASIC specific internal APIs.
Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
#include "driver/source/nmbus.h"
#include "bsp/include/nm_bsp.h"
#include "driver/source/nmasic.h"
#include "driver/include/wifi_firmware_1000b.h"
Macros | |
#define | GET_UINT32(X, Y) (X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24)) |
#define | M2M_DISABLE_PS 0xD0UL |
#define | NMI_GLB_RESET_0 (NMI_PERIPH_REG_BASE + 0x400) |
#define | NMI_GLB_RESET_1 (NMI_PERIPH_REG_BASE + 0x404) |
#define | NMI_INTR_ENABLE (NMI_INTR_REG_BASE) |
#define | NMI_INTR_REG_BASE (NMI_PERIPH_REG_BASE+0xa00) |
#define | NMI_PIN_MUX_0 (NMI_PERIPH_REG_BASE + 0x408) |
#define | TIMEOUT (2000) |
#define | WAKUP_TRAILS_TIMEOUT (10000) |
Functions | |
sint8 | chip_deinit (void) |
void | chip_idle (void) |
sint8 | chip_reset (void) |
sint8 | chip_sleep (void) |
sint8 | chip_wake (void) |
sint8 | cpu_start (void) |
sint8 | enable_interrupts (void) |
sint8 | firmware_download (void) |
sint8 | get_gpio_val (uint8 gpio, uint8 *val) |
sint8 | is_valid_gpio (uint8 gpio) |
uint32 | nmi_get_chipid (void) |
sint8 | nmi_get_mac_address (uint8 *pu8MacAddr) |
sint8 | nmi_get_otp_mac_address (uint8 *pu8MacAddr, uint8 *pu8IsValid) |
uint32 | nmi_get_rfrevid (void) |
void | nmi_set_sys_clk_src_to_xo (void) |
void | nmi_update_pll (void) |
sint8 | pullup_ctrl (uint32 pinmask, uint8 enable) |
void | restore_pmu_settings_after_global_reset (void) |
sint8 | set_gpio_dir (uint8 gpio, uint8 dir) |
sint8 | set_gpio_val (uint8 gpio, uint8 val) |
sint8 | wait_for_firmware_start (void) |
#define GET_UINT32 | ( | X, | |
Y | |||
) | (X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24)) |
#define M2M_DISABLE_PS 0xD0UL |
Referenced by hif_deinit().
#define NMI_GLB_RESET_0 (NMI_PERIPH_REG_BASE + 0x400) |
Referenced by chip_deinit(), chip_reset(), and cpu_start().
#define NMI_GLB_RESET_1 (NMI_PERIPH_REG_BASE + 0x404) |
Referenced by chip_reset().
#define NMI_INTR_ENABLE (NMI_INTR_REG_BASE) |
Referenced by enable_interrupts().
#define NMI_INTR_REG_BASE (NMI_PERIPH_REG_BASE+0xa00) |
#define NMI_PIN_MUX_0 (NMI_PERIPH_REG_BASE + 0x408) |
Referenced by enable_interrupts().
#define TIMEOUT (2000) |
Referenced by wait_for_firmware_start().
#define WAKUP_TRAILS_TIMEOUT (10000) |
Referenced by chip_wake().
stop the firmware, need a re-download
References M2M_DBG, M2M_ERR, M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_reg(), NMI_GLB_RESET_0, and timeout.
Referenced by nm_drv_deinit().
References nm_read_reg_with_ret(), nm_write_reg(), WILC_WAKEUP_BIT, and WILC_WAKEUP_REG.
References M2M_ERR, M2M_ERR_TIME_OUT, M2M_SUCCESS, nm_bus_reset(), nm_read_reg_with_ret(), nm_write_reg(), WAKUP_TRAILS_TIMEOUT, WILC_CLK_STATUS_BIT, WILC_CLK_STATUS_REG, WILC_FROM_INTERFACE_TO_WF_BIT, WILC_FROM_INTERFACE_TO_WF_REG, WILC_WAKEUP_BIT, and WILC_WAKEUP_REG.
Referenced by hif_chip_wake().
reset regs
Go...
References M2M_ERR, M2M_ERR_BUS_FAIL, M2M_SUCCESS, nm_bsp_sleep(), nm_read_reg_with_ret(), nm_write_reg(), NMI_GLB_RESET_0, NMI_REV_REG, NMI_STATE_REG, and NMI_VMM_CORE_CFG.
Referenced by nm_drv_init().
interrupt pin mux select
interrupt enable
References M2M_ERR_BUS_FAIL, M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_reg(), NMI_INTR_ENABLE, and NMI_PIN_MUX_0.
Referenced by nm_drv_init().
References M2M_DBG, m2m_memcpy(), M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_block(), and nm_write_reg().
Referenced by nm_drv_init().
References M2M_SUCCESS, and nm_read_reg_with_ret().
Referenced by gpio_ioctl().
Referenced by m2m_wifi_set_antenna_mode().
References M2M_SUCCESS, and nm_read_reg_with_ret().
Referenced by nm_drv_init(), and nm_get_firmware_info().
References M2M_SUCCESS, nm_read_block(), nm_read_reg_with_ret(), and rNMI_GP_REG_0.
Referenced by m2m_wifi_get_mac_address().
References EFUSED_MAC, M2M_DBG, m2m_memset(), M2M_SUCCESS, nm_read_block(), nm_read_reg_with_ret(), and rNMI_GP_REG_0.
Referenced by m2m_wifi_get_otp_mac_address().
References M2M_SUCCESS, and nm_read_reg_with_ret().
References nm_read_reg(), nm_write_reg(), and nmi_update_pll().
Referenced by chip_reset().
References nm_read_reg(), and nm_write_reg().
Referenced by nmi_set_sys_clk_src_to_xo().
References M2M_ERR, M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().
Referenced by m2m_periph_pullup_ctrl().
References nm_write_reg().
Referenced by chip_reset().
References M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().
Referenced by gpio_ioctl().
References M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().
Referenced by gpio_ioctl().
References M2M_DBG, M2M_ERR_INIT, M2M_FINISH_INIT_STATE, M2M_SUCCESS, nm_bsp_sleep(), nm_read_reg(), nm_write_reg(), NMI_STATE_REG, and TIMEOUT.
Referenced by nm_drv_init().