See Quick Start Guide for the MEGARF MACSC Driver.
This is a driver for the AVR MEGARF MAC Symbol Counter Driver(MACSC). It provides functions for enabling, disabling and configuring the module.
This driver depends on the following modules:
Modules | |
Related Project(s) | |
In this section you can find all the projects related to the MAC Symbol Counter Driver(MACSC). | |
Quick Start Guide(s) | |
In this section you can find a list of all Quick Start guides related to the MAC Symbol Counter Driver(MACSC). | |
MAC Symbol Counter (MACSC) interrupt | |
management This group provides functions to configure MACSC module interrupts | |
Macros | |
#define | CONCAT(a, b) a ## b |
String concatenation by preprocessor used to create proper register names. More... | |
#define | MACSC_ABSOLUTE_CMP 0 |
#define | MACSC_READ32(reg) |
Creates proper subregister names and reads the corresponding values. More... | |
#define | MACSC_RELATIVE_CMP 1 |
#define | MACSC_WRITE32(reg, val) |
Typedefs | |
typedef void(* | macsc_callback_t )(void) |
Interrupt event callback function type. More... | |
Enumerations | |
enum | macsc_cc_channel { MACSC_CC1 = 1, MACSC_CC2 = 2, MACSC_CC3 = 3 } |
enum | macsc_xtal { MACSC_16MHz = 0, MACSC_32KHz = 1 } |
MAC SC clock source select. More... | |
Functions | |
bool | is_macsc_backoff_enable (void) |
Check if back-off slot counter is enabled. More... | |
bool | is_macsc_enable (void) |
Check if MACSC is enabled. More... | |
void | macsc_disable (void) |
Disable MAC SC. More... | |
void | macsc_enable (void) |
Enable MAC SC. More... | |
void | macsc_enable_cmp_int (enum macsc_cc_channel channel) |
Enables compare interrupts of the MACSC. More... | |
static uint32_t | macsc_read32 (volatile uint8_t *hh, volatile uint8_t *hl, volatile uint8_t *lh, volatile uint8_t *ll) |
Reads the 32-bit timer register in the required order of bytes. More... | |
static void | macsc_sleep_clk_disable (void) |
Disable 32.768KHz clk using timer 2 async register. More... | |
static void | macsc_sleep_clk_enable (void) |
Enable 32.768KHz clk using timer 2 async register. More... | |
void | macsc_use_cmp (bool abs_rel, uint32_t cmp, enum macsc_cc_channel channel) |
Usage of Absolute compare mode of the MACSC. More... | |
#define CONCAT | ( | a, | |
b | |||
) | a ## b |
String concatenation by preprocessor used to create proper register names.
#define MACSC_ABSOLUTE_CMP 0 |
#define MACSC_READ32 | ( | reg | ) |
Creates proper subregister names and reads the corresponding values.
Referenced by macsc_read_bts(), macsc_read_count(), macsc_read_ts(), and test_macsc_cmp().
#define MACSC_RELATIVE_CMP 1 |
#define MACSC_WRITE32 | ( | reg, | |
val | |||
) |
Referenced by macsc_use_cmp(), and macsc_write_count().
typedef void(* macsc_callback_t)(void) |
Interrupt event callback function type.
The interrupt handler can be configured to do a function callback, the callback function must match the macsc_callback_t type.
enum macsc_cc_channel |
enum macsc_xtal |
MAC SC clock source select.
uses the SCCKSEL bit in SSCR register to select macsc clk src
If the bit is one,the RTC clock from TOSC1 is selected, otherwise the symbol counter operates with the clock from XTAL1. During transceiver sleep modes the clock falls back to the RTC clock source, regardless of the selected clock. After wakeup, it switches back to the previosly selected clock source.
Enumerator | |
---|---|
MACSC_16MHz | |
MACSC_32KHz |
bool is_macsc_backoff_enable | ( | void | ) |
Check if back-off slot counter is enabled.
check if the back-off slot counter is enabled.
none |
Referenced by test_macsc_backoff().
bool is_macsc_enable | ( | void | ) |
Check if MACSC is enabled.
check if the MACSC is enabled.
none |
Referenced by test_macsc_enable().
void macsc_disable | ( | void | ) |
void macsc_enable | ( | void | ) |
Enable MAC SC.
Enables the SC
clk_src | selection of clk source,avalable options in macsc_xtal,fixed prescalar |
sleep_enable | enable RTC as clock source during sleep |
auto_ts | enable automatic timestamping |
Enables the SC
none |
References cpu_irq_restore(), and cpu_irq_save().
Referenced by main(), and sm_sleep().
void macsc_enable_cmp_int | ( | enum macsc_cc_channel | channel | ) |
Enables compare interrupts of the MACSC.
channel | Compare channel |
References MACSC_CC1, MACSC_CC2, and MACSC_CC3.
Referenced by example_cmp1_int_cb(), example_cmp3_int_cb(), main(), sm_init(), and test_macsc_cmp().
|
inlinestatic |
Reads the 32-bit timer register in the required order of bytes.
hh | hh octet of 32-bit register |
hl | hl octet of 32-bit register |
lh | lh octet of 32-bit register |
ll | ll octet of 32-bit register |
|
inlinestatic |
Disable 32.768KHz clk using timer 2 async register.
none |
|
inlinestatic |
void macsc_use_cmp | ( | bool | abs_rel, |
uint32_t | cmp, | ||
enum macsc_cc_channel | channel | ||
) |
Usage of Absolute compare mode of the MACSC.
abs_rel | 0 for absoulte cmp;1 for relative cmp |
cmp | compare value for SCOCRx register |
channel | Compare channel |
Usage of Absolute compare mode of the MACSC.
abs_rel | 0 for absoulte cmp;1 for relative cmp |
cmp | compare value for SCOCRx register |
channel | Compare channel |
References MACSC_CC1, MACSC_CC2, MACSC_CC3, and MACSC_WRITE32.
Referenced by example_cmp1_int_cb(), example_cmp2_int_cb(), example_cmp3_int_cb(), main(), sm_sleep(), and test_macsc_cmp().