Board configuration.
Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
| #define | CONF_BOARD_ENABLE_CACHE |
| #define | CONF_BOARD_SPI |
| SPI MACRO definition. More... | |
| #define | CONF_BOARD_SPI_NPCS0 |
| SPI slave select MACRO definition. More... | |
| #define | CONF_BOARD_UART_CONSOLE |
| Enable Com Port. More... | |
| #define | SPI_ID ID_SPI0 |
| Spi Hw ID . More... | |
| #define | SPI_MASTER_BASE SPI0 |
| SPI base address for SPI master mode. More... | |
| #define | SPI_SLAVE_BASE SPI0 |
| SPI base address for SPI slave mode, (on different board) More... | |
| #define CONF_BOARD_ENABLE_CACHE |
| #define CONF_BOARD_SPI |
SPI MACRO definition.
| #define CONF_BOARD_SPI_NPCS0 |
SPI slave select MACRO definition.
| #define CONF_BOARD_UART_CONSOLE |
Enable Com Port.
| #define SPI_ID ID_SPI0 |
Spi Hw ID .
| #define SPI_MASTER_BASE SPI0 |
SPI base address for SPI master mode.
Referenced by spi_master_initialize().
| #define SPI_SLAVE_BASE SPI0 |
SPI base address for SPI slave mode, (on different board)
Referenced by spi_slave_initialize().
1.8.5