Header file for the AT42QT2160 device.

Data Structures
struct	qt_setup_block
	Definitions for AT42QT2160 setup block. More...

struct	qt_status
	Structure for QT2160 device-status, include: More...

Macros
#define	QT_GENERAL_STATUS_CC (1u << 1)

#define	QT_GENERAL_STATUS_CYCLE_OVER_RUN (1u << 6)

#define	QT_GENERAL_STATUS_RESET (1u << 8)

#define	QT_GENERAL_STATUS_SDET (1u << 0)

#define	QT_KEY_AKS_GROUP_1 1

#define	QT_KEY_AKS_GROUP_2 2

#define	QT_KEY_AKS_GROUP_3 3

#define	QT_KEY_AKS_GROUP_NONE 0

#define	QT_SLIDER_RESOLUTION_2_BIT 6

#define	QT_SLIDER_RESOLUTION_3_BIT 5

#define	QT_SLIDER_RESOLUTION_4_BIT 4

#define	QT_SLIDER_RESOLUTION_5_BIT 3

#define	QT_SLIDER_RESOLUTION_6_BIT 2

#define	QT_SLIDER_RESOLUTION_7_BIT 1

#define	QT_SLIDER_RESOLUTION_8_BIT 0

#define	QT_DEVICE_ID 0x11
	AT42QT2160 Chip ID. More...

#define	QT_SETUPS_BLOCK_ADDR 12
	Start address of QT device setup block. More...

enum	qt_reg_map { QT_REG_CHIP_ID = 0, QT_REG_CODE_VERSION, QT_REG_GENERAL_STATUS, QT_REG_KEY_STATUS_1, QT_REG_KEY_STATUS_2, QT_REG_SLIDER_POSITION, QT_REG_GPIO_READ, QT_REG_CALIBRATE = 10, QT_REG_RESET, QT_REG_LP_MODE, QT_REG_BREP, QT_REG_NEG_DRIFT_COMP = 15, QT_REG_POS_DRIFT_COMP, QT_REG_DI_LIMIT, QT_REG_NEG_RECAL_DELAY, QT_REG_DRIFT_HOLD_TIME, QT_REG_SLIDER_CONTROL, QT_REG_SLIDER_OPTIONS, QT_REG_KEY0_AKS_GRP, QT_REG_KEY1_AKS_GRP, QT_REG_KEY2_AKS_GRP, QT_REG_KEY3_AKS_GRP, QT_REG_KEY4_AKS_GRP, QT_REG_KEY5_AKS_GRP, QT_REG_KEY6_AKS_GRP, QT_REG_KEY7_AKS_GRP, QT_REG_KEY8_AKS_GRP, QT_REG_KEY9_AKS_GRP, QT_REG_KEY10_AKS_GRP, QT_REG_KEY11_AKS_GRP, QT_REG_KEY12_AKS_GRP, QT_REG_KEY13_AKS_GRP, QT_REG_KEY14_AKS_GRP, QT_REG_KEY15_AKS_GRP, QT_REG_KEY0_NTHR, QT_REG_KEY1_NTHR, QT_REG_KEY2_NTHR, QT_REG_KEY3_NTHR, QT_REG_KEY4_NTHR, QT_REG_KEY5_NTHR, QT_REG_KEY6_NTHR, QT_REG_KEY7_NTHR, QT_REG_KEY8_NTHR, QT_REG_KEY9_NTHR, QT_REG_KEY10_NTHR, QT_REG_KEY11_NTHR, QT_REG_KEY12_NTHR, QT_REG_KEY13_NTHR, QT_REG_KEY14_NTHR, QT_REG_KEY15_NTHR, QT_REG_KEY0_BL, QT_REG_KEY1_BL, QT_REG_KEY2_BL, QT_REG_KEY3_BL, QT_REG_KEY4_BL, QT_REG_KEY5_BL, QT_REG_KEY6_BL, QT_REG_KEY7_BL, QT_REG_KEY8_BL, QT_REG_KEY9_BL, QT_REG_KEY10_BL, QT_REG_KEY11_BL, QT_REG_KEY12_BL, QT_REG_KEY13_BL, QT_REG_KEY14_BL, QT_REG_KEY15_BL, QT_REG_GPO_DRIVE, QT_REG_GPIO_DRIVE, QT_REG_GPIO_DIR = 73, QT_REG_GPO_PWM, QT_REG_GPIO_PWM, QT_REG_PWM_LEVEL, QT_REG_GPIO_WAKE, QT_REG_COMM_CHG_KEYS_1, QT_REG_COMM_CHG_KEYS_2, QT_REG_KEY0_SIGNAL = 100, QT_REG_KEY1_SIGNAL = 102, QT_REG_KEY2_SIGNAL = 104, QT_REG_KEY3_SIGNAL = 106, QT_REG_KEY4_SIGNAL = 108, QT_REG_KEY5_SIGNAL = 110, QT_REG_KEY6_SIGNAL = 112, QT_REG_KEY7_SIGNAL = 114, QT_REG_KEY8_SIGNAL = 116, QT_REG_KEY9_SIGNAL = 118, QT_REG_KEY10_SIGNAL = 120, QT_REG_KEY11_SIGNAL = 122, QT_REG_KEY12_SIGNAL = 124, QT_REG_KEY13_SIGNAL = 126, QT_REG_KEY14_SIGNAL = 128, QT_REG_KEY15_SIGNAL = 130, QT_REG_KEY0_REFERENCE = 132, QT_REG_KEY1_REFERENCE = 134, QT_REG_KEY2_REFERENCE = 136, QT_REG_KEY3_REFERENCE = 138, QT_REG_KEY4_REFERENCE = 140, QT_REG_KEY5_REFERENCE = 142, QT_REG_KEY6_REFERENCE = 144, QT_REG_KEY7_REFERENCE = 146, QT_REG_KEY8_REFERENCE = 148, QT_REG_KEY9_REFERENCE = 150, QT_REG_KEY10_REFERENCE = 152, QT_REG_KEY11_REFERENCE = 154, QT_REG_KEY12_REFERENCE = 156, QT_REG_KEY13_REFERENCE = 158, QT_REG_KEY14_REFERENCE = 160, QT_REG_KEY15_REFERENCE = 162 }
	Definitions for AT42QT2160 registers map. More...

#define QT_GENERAL_STATUS_CC (1u << 1)

#define QT_GENERAL_STATUS_CYCLE_OVER_RUN (1u << 6)

#define QT_GENERAL_STATUS_RESET (1u << 8)

#define QT_GENERAL_STATUS_SDET (1u << 0)

#define QT_KEY_AKS_GROUP_1 1

#define QT_KEY_AKS_GROUP_2 2

#define QT_KEY_AKS_GROUP_3 3

#define QT_KEY_AKS_GROUP_NONE 0

#define QT_SLIDER_RESOLUTION_2_BIT 6

#define QT_SLIDER_RESOLUTION_3_BIT 5

#define QT_SLIDER_RESOLUTION_4_BIT 4

#define QT_SLIDER_RESOLUTION_5_BIT 3

#define QT_SLIDER_RESOLUTION_6_BIT 2

#define QT_SLIDER_RESOLUTION_7_BIT 1

#define QT_SLIDER_RESOLUTION_8_BIT 0

Microchip® Advanced Software Framework

Data Structures

Macros