This driver for Atmel® | SMART ARM®-based microcontrollers provides an interface for the configuration and management of the device's Reset Controller functionality.

The Reset Controller manages all Resets of the System including; external devices (via the NRST pin), Processor Reset and Peripheral Reset. It also provides the status of the last reset source.

The following peripheral is used by this module:

RSTC (Reset Controller)

Devices from the following series can use this module:

Atmel | SMART SAM3
Atmel | SMART SAM4C
Atmel | SMART SAM4CM
Atmel | SMART SAM4CP
Atmel | SMART SAM4E
Atmel | SMART SAM4N
Atmel | SMART SAM4S
Atmel | SMART SAM G
Atmel | SMART SAMV71
Atmel | SMART SAMV70
Atmel | SMART SAME70
Atmel | SMART SAMS70

The outline of this documentation is as follows:

Prerequisites

There are no prerequisites for this module.

Module Overview

The Reset Controller contains an NRST Manager and a Reset State Manager. It runs at Slow Clock (SCLK) and generates the following:

Processor and Watchdog Timer reset
Embedded peripheral reset
Co-processor and Co-processor peripheral reset (SAM4C devices only)
External device reset (via the NRST pin)

These reset signals are asserted by the Reset Controller acting on external events or as the result of an action performed by software. The Reset State Manager controls the operation of reset signals and provides a signal to the NRST Manager when an assertion of the NRST pin is required.

NRST Manager

To control an external device reset the NRST Manager shapes the NRST assertion period using a programmable timer. While asserted, after power-up, NRST is an output and driven low. When the programmable time period has elapsed the pin behaves as an input and all the system is held in reset if NRST is tied to GND by an external signal.

NRST Signal or Interrupt

The NRST Manager samples the NRST pin at Slow Clock (SCLK) speed and drives this pin low when required by the Reset State Manager. When the line is detected as being low a User Reset is reported to the Reset State Manager. However, the NRST Manager can be programmed not to trigger a reset when NRST is asserted.

The Reset controller can also be programmed to generate an interrupt instead of generating a reset.

NRST External Reset Control

The NRST Manager can assert NRST for a programmable time period of between 60µs and 2s (approximately). This allows the Reset Controller to shape the NRST pin level and thus to guarantee that the NRST line is low for a time that is compliant with any external devices also connected to the system reset.

Reset State Manager

The Reset State Manager handles the different reset sources and generates the internal reset signals.

General Reset

A general reset occurs when either a Power-on-reset is detected or the Supply Controller detects a Brownout or Voltage regulation loss.

Backup Reset

A Backup Reset occurs when the chip returns from Backup Mode. The core_backup_reset signal is asserted by the Supply Controller when a Backup Reset occurs.

User Reset

If User Reset is enabled then the state is entered when a low level is detected on the NRST pin. When User Reset is entered both the Processor Reset and the Peripheral Reset are asserted.

The User Reset state is left when NRST rises and the processor clock is re-enabled as soon as NRST is confirmed high.

Software Reset

The Reset Controller allows software to assert the the following reset signals:

Reset the processor and the Watchdog Timer
Reset all the embedded peripherals
Reset the Co-processor (SAM4C devices only)
Reset all the embedded peripherals associated with the Co-processor (SAM4C devices only)
Assert NRST for a programmable time period

Note: The embedded peripheral reset also includes the memory system and the Remap Command and is generally used for debugging purposes.; For SAM4C devices the Co-processor peripheral reset only affects the embedded peripherals associated with the Co-processor. The processor's peripherals are not reset.

Watchdog Reset

The Watchdog Reset is entered when a watchdog fault occurs.

Reset State Priorities

The Reset State Manager manages the following priorities between the different reset sources, given in descending order:

General Reset
Backup Reset
Watchdog Reset
Software Reset
User Reset

Particular cases are listed below:

When in User Reset:
- A watchdog event is impossible because the Watchdog Timer is being reset
- A Software Reset is impossible because the processor reset is being activated
When in Software Reset:
- A watchdog event has priority over the current state
- The NRST has no effect
When in Watchdog Reset:
- The processor reset is active and so a Software Reset cannot be programmed
- A User Reset cannot be entered

Special Considerations

System designs using any external devices that require a software controllable reset signal assertion longer than two seconds should use a dedicated I/O output of the microcontroller.

Extra Information

For extra information, see Extra Information for Reset Controller Driver. This includes:

Examples

For a list of examples related to this driver, see Examples for Reset Controller Driver.

API Overview

Modules
	Related Project(s)
	In this section you can find all the projects related to the SAM3/4C/4CM/4CP/4E/4N/4S/G/V71/V70/S70/E70 Reset Controller (RSTC) Driver.

Macros
#define	RSTC_BACKUP_RESET (1 << RSTC_SR_RSTTYP_Pos)

#define	RSTC_CPMR_KEY_PASSWD RSTC_CPMR_CPKEY(0x5AU)

#define	RSTC_GENERAL_RESET (0 << RSTC_SR_RSTTYP_Pos)

#define	RSTC_NRST_HIGH (HIGH << 16)

#define	RSTC_NRST_LOW (LOW << 16)

#define	RSTC_SOFTWARE_RESET (3 << RSTC_SR_RSTTYP_Pos)

#define	RSTC_USER_RESET (4 << RSTC_SR_RSTTYP_Pos)

#define	RSTC_WATCHDOG_RESET (2 << RSTC_SR_RSTTYP_Pos)

Functions
static void	rstc_assert_reset_of_coprocessor (Rstc *p_rstc, const uint32_t reset)
	Assert the reset of the Co-processor. More...

static void	rstc_deassert_reset_of_coprocessor (Rstc *p_rstc, const uint32_t reset)
	Deassert the reset of the Co-processor. More...

void	rstc_disable_user_reset (Rstc *p_rstc)
	Disable User Reset. More...

void	rstc_disable_user_reset_interrupt (Rstc *p_rstc)
	Disable the User Reset interrupt. More...

void	rstc_enable_user_reset (Rstc *p_rstc)
	Enable User Reset. More...

void	rstc_enable_user_reset_interrupt (Rstc *p_rstc)
	Enable the User Reset interrupt. More...

uint32_t	rstc_get_reset_cause (Rstc *p_rstc)
	Get the reset cause. More...

uint32_t	rstc_get_status (Rstc *p_rstc)
	Get the RSTC status. More...

void	rstc_reset_extern (Rstc *p_rstc)
	Asserts the NRST pin for external resets. More...

void	rstc_set_external_reset (Rstc *p_rstc, const uint32_t ul_length)
	Set the external reset length. More...

void	rstc_start_software_reset (Rstc *p_rstc)
	Perform a Software Reset. More...

#define RSTC_BACKUP_RESET (1 << RSTC_SR_RSTTYP_Pos)

Referenced by display_reset_reason().

#define RSTC_CPMR_KEY_PASSWD RSTC_CPMR_CPKEY(0x5AU)

Referenced by rstc_assert_reset_of_coprocessor(), and rstc_deassert_reset_of_coprocessor().

#define RSTC_GENERAL_RESET (0 << RSTC_SR_RSTTYP_Pos)

Referenced by display_reset_reason().

#define RSTC_NRST_HIGH (HIGH << 16)

#define RSTC_NRST_LOW (LOW << 16)

#define RSTC_SOFTWARE_RESET (3 << RSTC_SR_RSTTYP_Pos)

Referenced by display_reset_reason().

#define RSTC_USER_RESET (4 << RSTC_SR_RSTTYP_Pos)

Referenced by display_reset_reason().

#define RSTC_WATCHDOG_RESET (2 << RSTC_SR_RSTTYP_Pos)

Referenced by display_reset_reason().

static void rstc_assert_reset_of_coprocessor	(	Rstc *	p_rstc,
		const uint32_t	reset
	)

inlinestatic

Assert the reset of the Co-processor.

Note: This function is for SAM4C devices only.

Parameters

[in,out]	p_rstc	Module hardware register base address pointer
[in]	reset	The reset to be asserted as a bitmask, which could be RSTC_CPMR_CPEREN (peripheral reset) and/or RSTC_CPMR_CPROCEN (core reset).

References Assert, and RSTC_CPMR_KEY_PASSWD.

static void rstc_deassert_reset_of_coprocessor	(	Rstc *	p_rstc,
		const uint32_t	reset
	)

inlinestatic

Deassert the reset of the Co-processor.

Note: This function is for SAM4C devices only.

Parameters

[in,out]	p_rstc	Module hardware register base address pointer
[in]	reset	The reset to be deasserted as a bitmask, which could be RSTC_CPMR_CPEREN (peripheral reset) and/or RSTC_CPMR_CPROCEN (core reset).

References RSTC_CPMR_KEY_PASSWD.

void rstc_disable_user_reset ( Rstc * p_rstc )

Disable User Reset.

Parameters

[in,out] p_rstc Module hardware register base address pointer

References Assert, and RSTC_KEY.

Referenced by main().

void rstc_disable_user_reset_interrupt ( Rstc * p_rstc )

Disable the User Reset interrupt.

Parameters

[in,out] p_rstc Module hardware register base address pointer

References Assert, and RSTC_KEY.

Referenced by main().

void rstc_enable_user_reset ( Rstc * p_rstc )

Enable User Reset.

Parameters

[in,out] p_rstc Module hardware register base address pointer

References Assert, and RSTC_KEY.

Referenced by main().

void rstc_enable_user_reset_interrupt ( Rstc * p_rstc )

Enable the User Reset interrupt.

Parameters

[in,out] p_rstc Module hardware register base address pointer

References Assert, and RSTC_KEY.

Referenced by main().

uint32_t rstc_get_reset_cause ( Rstc * p_rstc )

Get the reset cause.

Parameters

[in] p_rstc Module hardware register base address pointer

Returns: The last reset cause.

Referenced by run_rstc_test().

uint32_t rstc_get_status ( Rstc * p_rstc )

Get the RSTC status.

Parameters

[in] p_rstc Module hardware register base address pointer

Returns: RSTC status.

Referenced by display_reset_reason().

void rstc_reset_extern ( Rstc * p_rstc )

Asserts the NRST pin for external resets.

Parameters

[out] p_rstc Module hardware register base address pointer

References RSTC_KEY.

Referenced by main().

void rstc_set_external_reset	(	Rstc *	p_rstc,
		const uint32_t	ul_length
	)

Set the external reset length.

Parameters

[in,out]	p_rstc	Module hardware register base address pointer
[in]	ul_length	The length of external reset

References Assert, and RSTC_KEY.

Referenced by main().

void rstc_start_software_reset ( Rstc * p_rstc )

Perform a Software Reset.

Parameters

[out] p_rstc Module hardware register base address pointer

References RSTC_KEY.

Referenced by main(), prvAppPhyTask(), and run_rstc_test().

Microchip® Advanced Software Framework

Prerequisites

Module Overview

NRST Manager

NRST Signal or Interrupt

NRST External Reset Control

Reset State Manager

General Reset

Backup Reset

User Reset

Software Reset

Watchdog Reset

Reset State Priorities

Special Considerations

Extra Information

Examples

API Overview

Modules

Macros

Functions