This module contains WILC ASIC specific internal APIs.
Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
#include "driver/source/nmbus.h"#include "bsp/include/nm_bsp.h"#include "driver/source/nmasic.h"Macros | |
| #define | GET_UINT32(X, Y) (X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24)) |
| #define | M2M_DISABLE_PS 0xD0UL |
| #define | NMI_GLB_RESET_0 (NMI_PERIPH_REG_BASE + 0x400) |
| #define | NMI_GLB_RESET_1 (NMI_PERIPH_REG_BASE + 0x404) |
| #define | NMI_INTR_ENABLE (NMI_INTR_REG_BASE) |
| #define | NMI_INTR_REG_BASE (NMI_PERIPH_REG_BASE+0xa00) |
| #define | NMI_PIN_MUX_0 (NMI_PERIPH_REG_BASE + 0x408) |
| #define | TIMEOUT (2000) |
| #define | WAKUP_TRAILS_TIMEOUT (10000) |
Functions | |
| sint8 | chip_deinit (void) |
| void | chip_idle (void) |
| sint8 | chip_reset (void) |
| sint8 | chip_sleep (void) |
| sint8 | chip_wake (void) |
| sint8 | cpu_start (void) |
| sint8 | enable_interrupts (void) |
| sint8 | firmware_download (void) |
| sint8 | get_gpio_val (uint8 gpio, uint8 *val) |
| sint8 | is_valid_gpio (uint8 gpio) |
| sint8 | nmi_get_mac_address (uint8 *pu8MacAddr) |
| sint8 | nmi_get_otp_mac_address (uint8 *pu8MacAddr, uint8 *pu8IsValid) |
| uint32 | nmi_get_rfrevid (void) |
| void | nmi_set_sys_clk_src_to_xo (void) |
| void | nmi_update_pll (void) |
| sint8 | pullup_ctrl (uint32 pinmask, uint8 enable) |
| void | restore_pmu_settings_after_global_reset (void) |
| sint8 | set_gpio_dir (uint8 gpio, uint8 dir) |
| sint8 | set_gpio_val (uint8 gpio, uint8 val) |
| sint8 | wait_for_firmware_start (void) |
| #define GET_UINT32 | ( | X, | |
| Y | |||
| ) | (X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24)) |
| #define M2M_DISABLE_PS 0xD0UL |
Referenced by hif_deinit().
| #define NMI_GLB_RESET_0 (NMI_PERIPH_REG_BASE + 0x400) |
Referenced by chip_deinit(), chip_reset(), and cpu_start().
| #define NMI_GLB_RESET_1 (NMI_PERIPH_REG_BASE + 0x404) |
Referenced by chip_reset().
| #define NMI_INTR_ENABLE (NMI_INTR_REG_BASE) |
Referenced by enable_interrupts().
| #define NMI_INTR_REG_BASE (NMI_PERIPH_REG_BASE+0xa00) |
| #define NMI_PIN_MUX_0 (NMI_PERIPH_REG_BASE + 0x408) |
Referenced by enable_interrupts().
| #define TIMEOUT (2000) |
Referenced by wait_for_firmware_start().
| #define WAKUP_TRAILS_TIMEOUT (10000) |
Referenced by chip_wake().
| sint8 chip_deinit | ( | void | ) |
stop the firmware, need a re-download
Referenced by nm_drv_deinit().
| void chip_idle | ( | void | ) |
Referenced by nm_drv_init_hold().
| sint8 chip_reset | ( | void | ) |
Referenced by chip_reset_and_cpu_halt(), and nm_drv_init_hold().
| sint8 chip_sleep | ( | void | ) |
Referenced by hif_chip_sleep().
| sint8 chip_wake | ( | void | ) |
Referenced by chip_reset_and_cpu_halt(), hif_chip_wake(), and nm_drv_init_hold().
| sint8 cpu_start | ( | void | ) |
| sint8 enable_interrupts | ( | void | ) |
interrupt pin mux select
interrupt enable
Referenced by m2m_wifi_download_mode(), nm_drv_init(), and nm_drv_init_start().
| sint8 firmware_download | ( | void | ) |
References M2M_DBG, m2m_memcpy(), M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_block(), and nm_write_reg().
Referenced by nm_drv_init().
Referenced by gpio_ioctl().
Referenced by m2m_wifi_set_antenna_mode().
Referenced by m2m_wifi_get_mac_address().
Referenced by m2m_wifi_get_otp_mac_address().
| uint32 nmi_get_rfrevid | ( | void | ) |
Referenced by atCmd_ChipInfo_Handler(), and main().
| void nmi_set_sys_clk_src_to_xo | ( | void | ) |
Referenced by chip_reset().
| void nmi_update_pll | ( | void | ) |
Referenced by nmi_set_sys_clk_src_to_xo().
Referenced by m2m_periph_pullup_ctrl().
| void restore_pmu_settings_after_global_reset | ( | void | ) |
Referenced by chip_reset().
Referenced by gpio_ioctl().
Referenced by gpio_ioctl().
| sint8 wait_for_firmware_start | ( | void | ) |
References cnt, M2M_DBG, M2M_ERR_INIT, M2M_FINISH_INIT_STATE, M2M_SUCCESS, nm_bsp_sleep(), nm_read_reg(), nm_write_reg(), NMI_STATE_REG, and TIMEOUT.
Referenced by nm_drv_init(), and nm_drv_init_start().
1.8.5