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SAMV71/V70/E70/S70 XDMA Controller (XDMAC) Driver

This driver for Atmel® | SMART SAM XDMA Controller (XDMAC) is a AHB-protocol central direct memory access controller.

It performs peripheral data transfer and memory move operations over one or two bus ports through the unidirectional communication channel. This is a driver for the configuration, enabling, disabling, and use of the XDMAC peripheral.

Devices from the following series can use this module:

The outline of this documentation is as follows:

Prerequisites

There are no prerequisites for this module.

Module Overview

The DMA Controller (XDMAC) is a AHB-protocol central direct memory access controller. It performs peripheral data transfer and memory move operations over one or two bus ports through the unidirectional communication channel. Each channel is fully programmable and provides both peripheral or memory to memory transfer. The channel features are configurable at implementation time.

Special Considerations

There are no special considerations for this module.

Extra Information

For extra information, see Extra Information for Extensible Direct Memory Access Controller Driver. This includes:

Examples

For a list of examples related to this driver, see Examples for Direct Memory Access Controller Driver.

API Overview

Modules

 Related Project(s)
 In this section you can find all the projects related to the SAMV71/V70/E70/S70 XDMA Controller (XDMAC) Driver.
 

Data Structures

struct  lld_view0
 Structure for storing parameters for DMA view0 that can be performed by the DMA Master transfer. More...
 
struct  lld_view1
 Structure for storing parameters for DMA view1 that can be performed by the DMA Master transfer. More...
 
struct  lld_view2
 Structure for storing parameters for DMA view2 that can be performed by the DMA Master transfer. More...
 
struct  lld_view3
 Structure for storing parameters for DMA view3 that can be performed by the DMA Master transfer. More...
 
struct  xdmac_channel_config_t
 XDMA config register for channel. More...
 

Macros

#define XDMAC_CHANNEL_HWID_AES_RX   38
 
#define XDMAC_CHANNEL_HWID_AES_TX   37
 
#define XDMAC_CHANNEL_HWID_AFEC0   35
 
#define XDMAC_CHANNEL_HWID_AFEC1   36
 
#define XDMAC_CHANNEL_HWID_DAC   30
 
#define XDMAC_CHANNEL_HWID_HSMCI   0
 DMA channel hardware interface number. More...
 
#define XDMAC_CHANNEL_HWID_PIOA   34
 
#define XDMAC_CHANNEL_HWID_PWM0   13
 
#define XDMAC_CHANNEL_HWID_PWM1   39
 
#define XDMAC_CHANNEL_HWID_QSPI_RX   6
 
#define XDMAC_CHANNEL_HWID_QSPI_TX   5
 
#define XDMAC_CHANNEL_HWID_SPI0_RX   2
 
#define XDMAC_CHANNEL_HWID_SPI0_TX   1
 
#define XDMAC_CHANNEL_HWID_SPI1_RX   4
 
#define XDMAC_CHANNEL_HWID_SPI1_TX   3
 
#define XDMAC_CHANNEL_HWID_SSC_RX   33
 
#define XDMAC_CHANNEL_HWID_SSC_TX   32
 
#define XDMAC_CHANNEL_HWID_TC0   40
 
#define XDMAC_CHANNEL_HWID_TC1   41
 
#define XDMAC_CHANNEL_HWID_TC2   42
 
#define XDMAC_CHANNEL_HWID_TC3   43
 
#define XDMAC_CHANNEL_HWID_TWIHS0_RX   15
 
#define XDMAC_CHANNEL_HWID_TWIHS0_TX   14
 
#define XDMAC_CHANNEL_HWID_TWIHS1_RX   17
 
#define XDMAC_CHANNEL_HWID_TWIHS1_TX   16
 
#define XDMAC_CHANNEL_HWID_TWIHS2_RX   19
 
#define XDMAC_CHANNEL_HWID_TWIHS2_TX   18
 
#define XDMAC_CHANNEL_HWID_UART0_RX   21
 
#define XDMAC_CHANNEL_HWID_UART0_TX   20
 
#define XDMAC_CHANNEL_HWID_UART1_RX   23
 
#define XDMAC_CHANNEL_HWID_UART1_TX   22
 
#define XDMAC_CHANNEL_HWID_UART2_RX   25
 
#define XDMAC_CHANNEL_HWID_UART2_TX   24
 
#define XDMAC_CHANNEL_HWID_UART3_RX   27
 
#define XDMAC_CHANNEL_HWID_UART3_TX   26
 
#define XDMAC_CHANNEL_HWID_UART4_RX   29
 
#define XDMAC_CHANNEL_HWID_UART4_TX   28
 
#define XDMAC_CHANNEL_HWID_USART0_RX   8
 
#define XDMAC_CHANNEL_HWID_USART0_TX   7
 
#define XDMAC_CHANNEL_HWID_USART1_RX   10
 
#define XDMAC_CHANNEL_HWID_USART1_TX   9
 
#define XDMAC_CHANNEL_HWID_USART2_RX   12
 
#define XDMAC_CHANNEL_HWID_USART2_TX   11
 
#define XDMAC_UBC_NDE   (0x1u << 24)
 
#define XDMAC_UBC_NDE_FETCH_DIS   (0x0u << 24)
 
#define XDMAC_UBC_NDE_FETCH_EN   (0x1u << 24)
 
#define XDMAC_UBC_NDEN   (0x1u << 26)
 
#define XDMAC_UBC_NDEN_UNCHANGED   (0x0u << 26)
 
#define XDMAC_UBC_NDEN_UPDATED   (0x1u << 26)
 
#define XDMAC_UBC_NSEN   (0x1u << 25)
 
#define XDMAC_UBC_NSEN_UNCHANGED   (0x0u << 25)
 
#define XDMAC_UBC_NSEN_UPDATED   (0x1u << 25)
 
#define XDMAC_UBC_NVIEW_Msk   (0x3u << XDMAC_UBC_NVIEW_Pos)
 
#define XDMAC_UBC_NVIEW_NDV0   (0x0u << XDMAC_UBC_NVIEW_Pos)
 
#define XDMAC_UBC_NVIEW_NDV1   (0x1u << XDMAC_UBC_NVIEW_Pos)
 
#define XDMAC_UBC_NVIEW_NDV2   (0x2u << XDMAC_UBC_NVIEW_Pos)
 
#define XDMAC_UBC_NVIEW_NDV3   (0x3u << XDMAC_UBC_NVIEW_Pos)
 
#define XDMAC_UBC_NVIEW_Pos   27
 
#define XDMAC_UBC_UBLEN(value)   ((XDMAC_UBC_UBLEN_Msk & ((value) << XDMAC_UBC_UBLEN_Pos)))
 
#define XDMAC_UBC_UBLEN_Msk   (0xffffffu << XDMAC_UBC_UBLEN_Pos)
 
#define XDMAC_UBC_UBLEN_Pos   0
 

Functions

static void xdmac_channel_disable (Xdmac *xdmac, uint32_t channel_num)
 Disables the relevant channel of given XDMAC. More...
 
static void xdmac_channel_disable_interrupt (Xdmac *xdmac, uint32_t channel_num, uint32_t mask)
 Disable interrupt with mask on the relevant channel of given XDMA. More...
 
static void xdmac_channel_enable (Xdmac *xdmac, uint32_t channel_num)
 enables the relevant channel of given XDMAC. More...
 
static void xdmac_channel_enable_interrupt (Xdmac *xdmac, uint32_t channel_num, uint32_t mask)
 Enable interrupt with mask on the relevant channel of given XDMA. More...
 
static uint32_t xdmac_channel_get_interrupt_mask (Xdmac *xdmac, uint32_t channel_num)
 Get interrupt mask for the relevant channel of given XDMA. More...
 
static uint32_t xdmac_channel_get_interrupt_status (Xdmac *xdmac, uint32_t channel_num)
 Get interrupt status for the relevant channel of given XDMA. More...
 
static uint32_t xdmac_channel_get_status (Xdmac *xdmac)
 Get Global channel status of given XDMAC. More...
 
static void xdmac_channel_read_suspend (Xdmac *xdmac, uint32_t channel_num)
 Suspend the relevant channel's read. More...
 
static void xdmac_channel_readwrite_resume (Xdmac *xdmac, uint32_t channel_num)
 Resume the relevant channel's read & write. More...
 
static void xdmac_channel_readwrite_suspend (Xdmac *xdmac, uint32_t channel_num)
 Suspend the relevant channel's read & write. More...
 
static void xdmac_channel_set_block_control (Xdmac *xdmac, uint32_t channel_num, uint32_t blen)
 Set block length for the relevant channel of given XDMA. More...
 
static void xdmac_channel_set_config (Xdmac *xdmac, uint32_t channel_num, uint32_t config)
 Set configuration for the relevant channel of given XDMA. More...
 
static void xdmac_channel_set_datastride_mempattern (Xdmac *xdmac, uint32_t channel_num, uint32_t dds_msp)
 Set the relevant channel's data stride memory pattern of given XDMA. More...
 
static void xdmac_channel_set_descriptor_addr (Xdmac *xdmac, uint32_t channel_num, uint32_t desc_addr, uint8_t ndaif)
 Set next descriptor's address & interface for the relevant channel of given XDMA. More...
 
static void xdmac_channel_set_descriptor_control (Xdmac *xdmac, uint32_t channel_num, uint32_t config)
 Set next descriptor's configuration for the relevant channel of given XDMA. More...
 
static void xdmac_channel_set_destination_addr (Xdmac *xdmac, uint32_t channel_num, uint32_t dst_addr)
 Set destination address for the relevant channel of given XDMA. More...
 
static void xdmac_channel_set_destination_microblock_stride (Xdmac *xdmac, uint32_t channel_num, uint32_t dubs)
 Set the relevant channel's destination microblock stride of given XDMA. More...
 
static void xdmac_channel_set_microblock_control (Xdmac *xdmac, uint32_t channel_num, uint32_t ublen)
 Set microblock length for the relevant channel of given XDMA. More...
 
static void xdmac_channel_set_source_addr (Xdmac *xdmac, uint32_t channel_num, uint32_t src_addr)
 Set source address for the relevant channel of given XDMA. More...
 
static void xdmac_channel_set_source_microblock_stride (Xdmac *xdmac, uint32_t channel_num, uint32_t subs)
 Set the relevant channel's source microblock stride of given XDMA. More...
 
static void xdmac_channel_software_flush_request (Xdmac *xdmac, uint32_t channel_num)
 Set software flush request on the relevant channel. More...
 
static void xdmac_channel_software_request (Xdmac *xdmac, uint32_t channel_num)
 Set software transfer request on the relevant channel. More...
 
static void xdmac_channel_write_suspend (Xdmac *xdmac, uint32_t channel_num)
 Suspend the relevant channel's write. More...
 
void xdmac_configure_transfer (Xdmac *xdmac, uint32_t channel_num, xdmac_channel_config_t *p_cfg)
 Configure DMA for a transfer. More...
 
static void xdmac_disable_interrupt (Xdmac *xdmac, uint32_t channel_num)
 Disables XDMAC global interrupt. More...
 
static void xdmac_enable_interrupt (Xdmac *xdmac, uint32_t channel_num)
 Enables XDMAC global interrupt. More...
 
static uint32_t xdmac_get_arbiter (Xdmac *xdmac)
 Get XDMAC global weighted arbiter configuration. More...
 
static uint32_t xdmac_get_config (Xdmac *xdmac)
 Get XDMAC global configuration. More...
 
static uint32_t xdmac_get_interrupt_mask (Xdmac *xdmac)
 Get XDMAC global interrupt mask. More...
 
static uint32_t xdmac_get_interrupt_status (Xdmac *xdmac)
 Get XDMAC global interrupt status. More...
 
static uint32_t xdmac_get_software_request_status (Xdmac *xdmac)
 Get software transfer status of the relevant channel. More...
 
static uint32_t xdmac_get_type (Xdmac *xdmac)
 Get XDMAC global type. More...
 

#define XDMAC_CHANNEL_HWID_AES_RX   38
#define XDMAC_CHANNEL_HWID_AES_TX   37
#define XDMAC_CHANNEL_HWID_AFEC0   35
#define XDMAC_CHANNEL_HWID_AFEC1   36
#define XDMAC_CHANNEL_HWID_DAC   30
#define XDMAC_CHANNEL_HWID_HSMCI   0

DMA channel hardware interface number.

#define XDMAC_CHANNEL_HWID_PIOA   34
#define XDMAC_CHANNEL_HWID_PWM0   13
#define XDMAC_CHANNEL_HWID_PWM1   39
#define XDMAC_CHANNEL_HWID_QSPI_RX   6
#define XDMAC_CHANNEL_HWID_QSPI_TX   5
#define XDMAC_CHANNEL_HWID_SPI0_RX   2
#define XDMAC_CHANNEL_HWID_SPI0_TX   1
#define XDMAC_CHANNEL_HWID_SPI1_RX   4
#define XDMAC_CHANNEL_HWID_SPI1_TX   3
#define XDMAC_CHANNEL_HWID_SSC_RX   33
#define XDMAC_CHANNEL_HWID_SSC_TX   32
#define XDMAC_CHANNEL_HWID_TC0   40
#define XDMAC_CHANNEL_HWID_TC1   41
#define XDMAC_CHANNEL_HWID_TC2   42
#define XDMAC_CHANNEL_HWID_TC3   43
#define XDMAC_CHANNEL_HWID_TWIHS0_RX   15
#define XDMAC_CHANNEL_HWID_TWIHS0_TX   14
#define XDMAC_CHANNEL_HWID_TWIHS1_RX   17
#define XDMAC_CHANNEL_HWID_TWIHS1_TX   16
#define XDMAC_CHANNEL_HWID_TWIHS2_RX   19
#define XDMAC_CHANNEL_HWID_TWIHS2_TX   18
#define XDMAC_CHANNEL_HWID_UART0_RX   21
#define XDMAC_CHANNEL_HWID_UART0_TX   20
#define XDMAC_CHANNEL_HWID_UART1_RX   23
#define XDMAC_CHANNEL_HWID_UART1_TX   22
#define XDMAC_CHANNEL_HWID_UART2_RX   25
#define XDMAC_CHANNEL_HWID_UART2_TX   24
#define XDMAC_CHANNEL_HWID_UART3_RX   27
#define XDMAC_CHANNEL_HWID_UART3_TX   26
#define XDMAC_CHANNEL_HWID_UART4_RX   29
#define XDMAC_CHANNEL_HWID_UART4_TX   28
#define XDMAC_CHANNEL_HWID_USART0_RX   8
#define XDMAC_CHANNEL_HWID_USART0_TX   7
#define XDMAC_CHANNEL_HWID_USART1_RX   10
#define XDMAC_CHANNEL_HWID_USART1_TX   9
#define XDMAC_CHANNEL_HWID_USART2_RX   12
#define XDMAC_CHANNEL_HWID_USART2_TX   11
#define XDMAC_UBC_NDE   (0x1u << 24)
#define XDMAC_UBC_NDE_FETCH_DIS   (0x0u << 24)

Referenced by afec_xdmac_configure().

#define XDMAC_UBC_NDE_FETCH_EN   (0x1u << 24)

Referenced by main().

#define XDMAC_UBC_NDEN   (0x1u << 26)
#define XDMAC_UBC_NDEN_UNCHANGED   (0x0u << 26)
#define XDMAC_UBC_NDEN_UPDATED   (0x1u << 26)

Referenced by afec_xdmac_configure(), and main().

#define XDMAC_UBC_NSEN   (0x1u << 25)
#define XDMAC_UBC_NSEN_UNCHANGED   (0x0u << 25)
#define XDMAC_UBC_NSEN_UPDATED   (0x1u << 25)

Referenced by main().

#define XDMAC_UBC_NVIEW_Msk   (0x3u << XDMAC_UBC_NVIEW_Pos)
#define XDMAC_UBC_NVIEW_NDV0   (0x0u << XDMAC_UBC_NVIEW_Pos)

Referenced by afec_xdmac_configure(), and main().

#define XDMAC_UBC_NVIEW_NDV1   (0x1u << XDMAC_UBC_NVIEW_Pos)
#define XDMAC_UBC_NVIEW_NDV2   (0x2u << XDMAC_UBC_NVIEW_Pos)
#define XDMAC_UBC_NVIEW_NDV3   (0x3u << XDMAC_UBC_NVIEW_Pos)
#define XDMAC_UBC_NVIEW_Pos   27
#define XDMAC_UBC_UBLEN (   value)    ((XDMAC_UBC_UBLEN_Msk & ((value) << XDMAC_UBC_UBLEN_Pos)))

Referenced by main().

#define XDMAC_UBC_UBLEN_Msk   (0xffffffu << XDMAC_UBC_UBLEN_Pos)
#define XDMAC_UBC_UBLEN_Pos   0

static void xdmac_channel_disable ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Disables the relevant channel of given XDMAC.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23)

References Assert.

Referenced by spi_disable_xdmac().

static void xdmac_channel_disable_interrupt ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  mask 
)
inlinestatic

Disable interrupt with mask on the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).
[in]maskInterrupt mask.

References Assert.

Referenced by spi_disable_xdmac().

static void xdmac_channel_enable ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

enables the relevant channel of given XDMAC.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23)

References Assert.

Referenced by afec_xdmac_configure(), main(), and spi_xdmac_configure().

static void xdmac_channel_enable_interrupt ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  mask 
)
inlinestatic

Enable interrupt with mask on the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).
[in]maskInterrupt mask.

References Assert.

Referenced by afec_xdmac_configure(), main(), and spi_xdmac_configure().

static uint32_t xdmac_channel_get_interrupt_mask ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Get interrupt mask for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

static uint32_t xdmac_channel_get_interrupt_status ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Get interrupt status for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

Referenced by xdmac_channel_software_flush_request(), xdmac_configure_transfer(), and XDMAC_Handler().

static uint32_t xdmac_channel_get_status ( Xdmac *  xdmac)
inlinestatic

Get Global channel status of given XDMAC.

Note
: When set to 1, this bit indicates that the channel x is enabled. If a channel disable request is issued, this bit remains asserted until pending transaction is completed.
Parameters
[out]xdmacModule hardware register base address pointer.

References Assert.

static void xdmac_channel_read_suspend ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Suspend the relevant channel's read.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

static void xdmac_channel_readwrite_resume ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Resume the relevant channel's read & write.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

static void xdmac_channel_readwrite_suspend ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Suspend the relevant channel's read & write.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

static void xdmac_channel_set_block_control ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  blen 
)
inlinestatic

Set block length for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numXDMA Channel number (range 0 to 23)
[in]blenBlock length.

References Assert.

Referenced by xdmac_configure_transfer().

static void xdmac_channel_set_config ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  config 
)
inlinestatic

Set configuration for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numXDMA Channel number (range 0 to 23)
[in]configChannel configuration.

References Assert.

Referenced by xdmac_configure_transfer().

static void xdmac_channel_set_datastride_mempattern ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  dds_msp 
)
inlinestatic

Set the relevant channel's data stride memory pattern of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numXDMA Channel number (range 0 to 23)
[in]dds_mspData stride memory pattern.

References Assert.

Referenced by xdmac_configure_transfer().

static void xdmac_channel_set_descriptor_addr ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  desc_addr,
uint8_t  ndaif 
)
inlinestatic

Set next descriptor's address & interface for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numDMA Channel number (range 0 to 23)
[in]desc_addrAddress of next descriptor.
[in]ndaifInterface of next descriptor.

References Assert.

Referenced by main().

static void xdmac_channel_set_descriptor_control ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  config 
)
inlinestatic

Set next descriptor's configuration for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numDMA Channel number (range 0 to 23)
[in]configConfiguration of next descriptor.

References Assert.

Referenced by afec_xdmac_configure(), main(), and spi_xdmac_configure().

static void xdmac_channel_set_destination_addr ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  dst_addr 
)
inlinestatic

Set destination address for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numDMA Channel number (range 0 to 23)
[in]dst_addrDestination address

References Assert.

Referenced by xdmac_configure_transfer().

static void xdmac_channel_set_destination_microblock_stride ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  dubs 
)
inlinestatic

Set the relevant channel's destination microblock stride of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numXDMA Channel number (range 0 to 23)
[in]dubsDestination microblock stride.

References Assert.

Referenced by xdmac_configure_transfer().

static void xdmac_channel_set_microblock_control ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  ublen 
)
inlinestatic

Set microblock length for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numDMA Channel number (range 0 to 23)
[in]ublenMicroblock length.

References Assert.

Referenced by xdmac_configure_transfer().

static void xdmac_channel_set_source_addr ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  src_addr 
)
inlinestatic

Set source address for the relevant channel of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numDMA Channel number (range 0 to 23)
[in]src_addrSource address

References Assert.

Referenced by xdmac_configure_transfer().

static void xdmac_channel_set_source_microblock_stride ( Xdmac *  xdmac,
uint32_t  channel_num,
uint32_t  subs 
)
inlinestatic

Set the relevant channel's source microblock stride of given XDMA.

Parameters
[out]xdmacModule hardware register base address pointer
[in]channel_numXDMA Channel number (range 0 to 23)
[in]subsSource microblock stride.

References Assert.

Referenced by xdmac_configure_transfer().

static void xdmac_channel_software_flush_request ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Set software flush request on the relevant channel.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert, and xdmac_channel_get_interrupt_status().

static void xdmac_channel_software_request ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Set software transfer request on the relevant channel.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

static void xdmac_channel_write_suspend ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Suspend the relevant channel's write.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

void xdmac_configure_transfer ( Xdmac *  xdmac,
uint32_t  channel_num,
xdmac_channel_config_t *  cfg 
)

Configure DMA for a transfer.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numThe used channel number.
[in]cfgThe configuration for used channel

References Assert, xdmac_channel_config_t::mbr_bc, xdmac_channel_config_t::mbr_cfg, xdmac_channel_config_t::mbr_da, xdmac_channel_config_t::mbr_ds, xdmac_channel_config_t::mbr_dus, xdmac_channel_config_t::mbr_sa, xdmac_channel_config_t::mbr_sus, xdmac_channel_config_t::mbr_ubc, xdmac_channel_get_interrupt_status(), xdmac_channel_set_block_control(), xdmac_channel_set_config(), xdmac_channel_set_datastride_mempattern(), xdmac_channel_set_destination_addr(), xdmac_channel_set_destination_microblock_stride(), xdmac_channel_set_microblock_control(), xdmac_channel_set_source_addr(), and xdmac_channel_set_source_microblock_stride().

Referenced by afec_xdmac_configure(), main(), and spi_xdmac_configure().

static void xdmac_disable_interrupt ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Disables XDMAC global interrupt.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

Referenced by spi_disable_xdmac().

static void xdmac_enable_interrupt ( Xdmac *  xdmac,
uint32_t  channel_num 
)
inlinestatic

Enables XDMAC global interrupt.

Parameters
[out]xdmacModule hardware register base address pointer.
[in]channel_numXDMA Channel number (range 0 to 23).

References Assert.

Referenced by afec_xdmac_configure(), main(), and spi_xdmac_configure().

static uint32_t xdmac_get_arbiter ( Xdmac *  xdmac)
inlinestatic

Get XDMAC global weighted arbiter configuration.

Parameters
[out]xdmacModule hardware register base address pointer.

References Assert.

static uint32_t xdmac_get_config ( Xdmac *  xdmac)
inlinestatic

Get XDMAC global configuration.

Parameters
[out]xdmacModule hardware register base address pointer.

References Assert.

static uint32_t xdmac_get_interrupt_mask ( Xdmac *  xdmac)
inlinestatic

Get XDMAC global interrupt mask.

Parameters
[out]xdmacModule hardware register base address pointer.

References Assert.

static uint32_t xdmac_get_interrupt_status ( Xdmac *  xdmac)
inlinestatic

Get XDMAC global interrupt status.

Parameters
[out]xdmacModule hardware register base address pointer.

References Assert.

static uint32_t xdmac_get_software_request_status ( Xdmac *  xdmac)
inlinestatic

Get software transfer status of the relevant channel.

Parameters
[out]xdmacModule hardware register base address pointer.

References Assert.

static uint32_t xdmac_get_type ( Xdmac *  xdmac)
inlinestatic

Get XDMAC global type.

Parameters
[out]xdmacModule hardware register base address pointer.

References Assert.

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