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Static Memory Controller (SMC)

Driver for the Static Memory Controller.

It provides functions for configuring and using the on-chip SMC.

API Overview

Note
Some APIs are only available for specific SAM devices.

Macros

#define ECC_STATUS_MASK   0x07
 
#define NFC_BUSY_FLAG   0x8000000
 
#define NFCADDR_CMD_ACYCLE   (0x7u << 19) /* Number of Address required for the current command */
 
#define NFCADDR_CMD_ACYCLE_FIVE   (0x5u << 19) /* Five address cycles */
 
#define NFCADDR_CMD_ACYCLE_FOUR   (0x4u << 19) /* Four address cycles */
 
#define NFCADDR_CMD_ACYCLE_NONE   (0x0u << 19) /* No address cycle */
 
#define NFCADDR_CMD_ACYCLE_ONE   (0x1u << 19) /* One address cycle */
 
#define NFCADDR_CMD_ACYCLE_THREE   (0x3u << 19) /* Three address cycles */
 
#define NFCADDR_CMD_ACYCLE_TWO   (0x2u << 19) /* Two address cycles */
 
#define NFCADDR_CMD_CMD1   (0xFFu << 2) /* Command Register Value for Cycle 1 */
 
#define NFCADDR_CMD_CMD2   (0xFFu << 10) /* Command Register Value for Cycle 2 */
 
#define NFCADDR_CMD_CSID(value)   ((NFCADDR_CMD_CSID_Msk & ((value) << NFCADDR_CMD_CSID_Pos)))
 
#define NFCADDR_CMD_CSID_Msk   (0x7u << NFCADDR_CMD_CSID_Pos) /* Chip Select Identifier */
 
#define NFCADDR_CMD_CSID_Pos   22
 
#define NFCADDR_CMD_NFC_READ   (0x0u << 26) /* NFC Write Enable */
 
#define NFCADDR_CMD_NFC_WIRTE   (0x1u << 26) /* NFC Write Enable */
 
#define NFCADDR_CMD_NFCCMD   (0x1u << 27) /* NFC Command Enable */
 
#define NFCADDR_CMD_NFCEN   (0x1u << 25) /* NFC Enable */
 
#define NFCADDR_CMD_VCMD2   (0x1u << 18) /* Valid Cycle 2 Command */
 

Functions

uint32_t smc_ecc_get_status (Smc *p_smc, uint32_t ul_parity_number)
 Get ECC status by giving ecc number. More...
 
void smc_ecc_get_value (Smc *p_smc, uint32_t *p_ecc)
 Get all ECC parity registers value. More...
 
void smc_ecc_init (Smc *p_smc, uint32_t ul_type, uint32_t ul_pagesize)
 Initialize ECC mode. More...
 
void smc_enable_writeprotect (Smc *p_smc, uint32_t ul_enable)
 Set write protection of SMC registers. More...
 
uint32_t smc_get_mode (Smc *p_smc, uint32_t ul_cs)
 Get the SMC mode of the specified Chip Select. More...
 
uint32_t smc_get_writeprotect_status (Smc *p_smc)
 Get the status of SMC write protection register. More...
 
void smc_nfc_disable (Smc *p_smc)
 Disable NFC controller. More...
 
void smc_nfc_disable_interrupt (Smc *p_smc, uint32_t ul_sources)
 Disable SMC interrupts. More...
 
void smc_nfc_disable_spare_read (Smc *p_smc)
 Prevent NFC controller from reading the spare area in read mode. More...
 
void smc_nfc_disable_spare_write (Smc *p_smc)
 Prevent NFC controller from writing the spare area in read mode. More...
 
void smc_nfc_enable (Smc *p_smc)
 Enable NFC controller. More...
 
void smc_nfc_enable_interrupt (Smc *p_smc, uint32_t ul_sources)
 Enable SMC interrupts. More...
 
void smc_nfc_enable_spare_read (Smc *p_smc)
 Enable NFC controller to read both main and spare area in read mode. More...
 
void smc_nfc_enable_spare_write (Smc *p_smc)
 Enable NFC controller to write both main and spare area in write mode. More...
 
uint32_t smc_nfc_get_interrupt_mask (Smc *p_smc)
 Get the interrupt mask. More...
 
uint32_t smc_nfc_get_status (Smc *p_smc)
 Get the NFC Status. More...
 
void smc_nfc_init (Smc *p_smc, uint32_t ul_config)
 Initialize NFC configuration. More...
 
void smc_nfc_send_command (Smc *p_smc, uint32_t ul_cmd, uint32_t ul_address_cycle, uint32_t ul_cycle0)
 Use the HOST nandflash controller to send a command. More...
 
void smc_nfc_set_address0 (Smc *p_smc, uint8_t uc_address0)
 Set flash cycle 0 address. More...
 
void smc_nfc_set_bank (Smc *p_smc, uint32_t ul_bank)
 Set NFC sram bank. More...
 
void smc_nfc_set_page_size (Smc *p_smc, uint32_t ul_page_size)
 Set NFC page size. More...
 
void smc_set_cycle_timing (Smc *p_smc, uint32_t ul_cs, uint32_t ul_cycle_timing)
 Configure the SMC cycle timing for the specified Chip Select. More...
 
void smc_set_mode (Smc *p_smc, uint32_t ul_cs, uint32_t ul_mode)
 Configure the SMC mode for the specified Chip Select. More...
 
void smc_set_nand_timing (Smc *p_smc, uint32_t ul_cs, uint32_t ul_nand_timing)
 Configure the SMC nand timing for the specified Chip Select. More...
 
void smc_set_pulse_timing (Smc *p_smc, uint32_t ul_cs, uint32_t ul_pulse_timing)
 Configure the SMC pulse timing for the specified Chip Select. More...
 
void smc_set_setup_timing (Smc *p_smc, uint32_t ul_cs, uint32_t ul_setup_timing)
 Configure the SMC Setup timing for the specified Chip Select. More...
 

#define ECC_STATUS_MASK   0x07

Referenced by smc_ecc_get_status().

#define NFC_BUSY_FLAG   0x8000000

Referenced by smc_nfc_send_command().

#define NFCADDR_CMD_ACYCLE   (0x7u << 19) /* Number of Address required for the current command */
#define NFCADDR_CMD_ACYCLE_FIVE   (0x5u << 19) /* Five address cycles */
#define NFCADDR_CMD_ACYCLE_FOUR   (0x4u << 19) /* Four address cycles */
#define NFCADDR_CMD_ACYCLE_NONE   (0x0u << 19) /* No address cycle */
#define NFCADDR_CMD_ACYCLE_ONE   (0x1u << 19) /* One address cycle */
#define NFCADDR_CMD_ACYCLE_THREE   (0x3u << 19) /* Three address cycles */
#define NFCADDR_CMD_ACYCLE_TWO   (0x2u << 19) /* Two address cycles */
#define NFCADDR_CMD_CMD1   (0xFFu << 2) /* Command Register Value for Cycle 1 */
#define NFCADDR_CMD_CMD2   (0xFFu << 10) /* Command Register Value for Cycle 2 */
#define NFCADDR_CMD_CSID (   value)    ((NFCADDR_CMD_CSID_Msk & ((value) << NFCADDR_CMD_CSID_Pos)))
#define NFCADDR_CMD_CSID_Msk   (0x7u << NFCADDR_CMD_CSID_Pos) /* Chip Select Identifier */
#define NFCADDR_CMD_CSID_Pos   22
#define NFCADDR_CMD_NFC_READ   (0x0u << 26) /* NFC Write Enable */
#define NFCADDR_CMD_NFC_WIRTE   (0x1u << 26) /* NFC Write Enable */
#define NFCADDR_CMD_NFCCMD   (0x1u << 27) /* NFC Command Enable */

Referenced by smc_nfc_send_command().

#define NFCADDR_CMD_NFCEN   (0x1u << 25) /* NFC Enable */
#define NFCADDR_CMD_VCMD2   (0x1u << 18) /* Valid Cycle 2 Command */

uint32_t smc_ecc_get_status ( Smc *  p_smc,
uint32_t  ul_parity_number 
)

Get ECC status by giving ecc number.

Parameters
p_smcPointer to an SMC instance.
ul_parity_numberECC parity number from 0 to 15.
Returns
ECC status by giving ECC number.

References ECC_STATUS_MASK, and status.

void smc_ecc_get_value ( Smc *  p_smc,
uint32_t *  p_ecc 
)

Get all ECC parity registers value.

Parameters
p_smcPointer to an SMC instance.
p_eccPointer to a parity buffer.
void smc_ecc_init ( Smc *  p_smc,
uint32_t  ul_type,
uint32_t  ul_pagesize 
)

Initialize ECC mode.

Parameters
p_smcPointer to an SMC instance.
ul_typeType of correction, use pattern defined in the device header file.
ul_pagesizePage size of NAND Flash device, use pattern defined in the device header file.
void smc_enable_writeprotect ( Smc *  p_smc,
uint32_t  ul_enable 
)

Set write protection of SMC registers.

Parameters
p_smcPointer to an SMC instance.
ul_enable1 to enable, 0 to disable.

References SMC_WPKEY_VALUE.

uint32_t smc_get_mode ( Smc *  p_smc,
uint32_t  ul_cs 
)

Get the SMC mode of the specified Chip Select.

Parameters
p_smcPointer to an SMC instance.
ul_csChip select number to be set.
Returns
SMC mode.
uint32_t smc_get_writeprotect_status ( Smc *  p_smc)

Get the status of SMC write protection register.

Parameters
p_smcPointer to an SMC instance.
Returns
Write protect status.
void smc_nfc_disable ( Smc *  p_smc)

Disable NFC controller.

Parameters
p_smcPointer to an SMC instance.
void smc_nfc_disable_interrupt ( Smc *  p_smc,
uint32_t  ul_sources 
)

Disable SMC interrupts.

Parameters
p_smcPointer to an SMC instance.
ul_sourcesInterrupt source bitmap.
void smc_nfc_disable_spare_read ( Smc *  p_smc)

Prevent NFC controller from reading the spare area in read mode.

Parameters
p_smcPointer to an SMC instance.
void smc_nfc_disable_spare_write ( Smc *  p_smc)

Prevent NFC controller from writing the spare area in read mode.

Parameters
p_smcPointer to an SMC instance.
void smc_nfc_enable ( Smc *  p_smc)

Enable NFC controller.

Parameters
p_smcPointer to an SMC instance.
void smc_nfc_enable_interrupt ( Smc *  p_smc,
uint32_t  ul_sources 
)

Enable SMC interrupts.

Parameters
p_smcPointer to an SMC instance.
ul_sourcesInterrupt source bitmap.
void smc_nfc_enable_spare_read ( Smc *  p_smc)

Enable NFC controller to read both main and spare area in read mode.

Parameters
p_smcPointer to an SMC instance.
void smc_nfc_enable_spare_write ( Smc *  p_smc)

Enable NFC controller to write both main and spare area in write mode.

Parameters
p_smcPointer to an SMC instance.
uint32_t smc_nfc_get_interrupt_mask ( Smc *  p_smc)

Get the interrupt mask.

Parameters
p_smcPointer to an SMC instance.
Returns
Interrupt mask bitmap.
uint32_t smc_nfc_get_status ( Smc *  p_smc)

Get the NFC Status.

Parameters
p_smcPointer to an SMC instance.
Returns
Returns the current status register of SMC NFC Status Register. This resets the internal value of the status register, so further read may yield different values.
void smc_nfc_init ( Smc *  p_smc,
uint32_t  ul_config 
)

Initialize NFC configuration.

Parameters
p_smcPointer to an SMC instance.
ul_configSMC NFC Configuration.
void smc_nfc_send_command ( Smc *  p_smc,
uint32_t  ul_cmd,
uint32_t  ul_address_cycle,
uint32_t  ul_cycle0 
)

Use the HOST nandflash controller to send a command.

Parameters
p_smcPointer to an SMC instance.
ul_cmdCommand to send.
ul_address_cycleAddress cycle when command access is decoded.
ul_cycle0Address at first cycle.

References NFC_BUSY_FLAG, and NFCADDR_CMD_NFCCMD.

void smc_nfc_set_address0 ( Smc *  p_smc,
uint8_t  uc_address0 
)

Set flash cycle 0 address.

Parameters
p_smcPointer to an SMC instance.
uc_address0Address cycle 0 in 5 address cycles.
void smc_nfc_set_bank ( Smc *  p_smc,
uint32_t  ul_bank 
)

Set NFC sram bank.

Parameters
p_smcPointer to an SMC instance.
ul_bankNFC sram bank.
void smc_nfc_set_page_size ( Smc *  p_smc,
uint32_t  ul_page_size 
)

Set NFC page size.

Parameters
p_smcPointer to an SMC instance.
ul_page_sizeUse pattern defined in the device header file.
void smc_set_cycle_timing ( Smc *  p_smc,
uint32_t  ul_cs,
uint32_t  ul_cycle_timing 
)

Configure the SMC cycle timing for the specified Chip Select.

Parameters
p_smcPointer to an SMC instance.
ul_csChip Select number to be set.
ul_cycle_timingCycle timing for NWE and NRD.

Referenced by gfx_ili9325_init(), gfx_ili93xx_init(), and ili9488_init().

void smc_set_mode ( Smc *  p_smc,
uint32_t  ul_cs,
uint32_t  ul_mode 
)

Configure the SMC mode for the specified Chip Select.

Parameters
p_smcPointer to an SMC instance.
ul_csChip select number to be set.
ul_modeSMC mode.

Referenced by gfx_ili9325_init(), gfx_ili93xx_init(), and ili9488_init().

void smc_set_nand_timing ( Smc *  p_smc,
uint32_t  ul_cs,
uint32_t  ul_nand_timing 
)

Configure the SMC nand timing for the specified Chip Select.

Parameters
p_smcPointer to an SMC instance.
ul_csChip Select number to be set.
ul_nand_timingnand timing for related signal.
void smc_set_pulse_timing ( Smc *  p_smc,
uint32_t  ul_cs,
uint32_t  ul_pulse_timing 
)

Configure the SMC pulse timing for the specified Chip Select.

Parameters
p_smcPointer to an SMC instance.
ul_csChip Select number to be set.
ul_pulse_timingPulse timing for NWE,NCS,NRD.

Referenced by gfx_ili9325_init(), gfx_ili93xx_init(), and ili9488_init().

void smc_set_setup_timing ( Smc *  p_smc,
uint32_t  ul_cs,
uint32_t  ul_setup_timing 
)

Configure the SMC Setup timing for the specified Chip Select.

Parameters
p_smcPointer to an SMC instance.
ul_csChip Select number to be set.
ul_setup_timingSetup timing for NWE, NCS, NRD.

Referenced by gfx_ili9325_init(), gfx_ili93xx_init(), and ili9488_init().