This module contains WINC3400 ASIC specific internal APIs.
Copyright (c) 2017-2019 Microchip Technology Inc. and its subsidiaries.
#include "common/include/nm_common.h"
Data Structures | |
struct | tstrGpRegs |
Macros | |
#define | BOOTROM_REG (0xc000c) |
#define | CHIP_ID_3000D (0x3000D0) |
#define | EFUSED_MAC(value) (value & 0xffff0000) |
#define | GET_CHIPID() nmi_get_chipid() |
#define | ISNMC1000(id) (((id & 0xfffff000) == 0x100000) ? 1 : 0) |
#define | ISNMC1500(id) (((id & 0xfffff000) == 0x150000) ? 1 : 0) |
#define | ISNMC3400(id) (((id & 0xfff0f000) == 0x300000) ? 1 : 0) |
#define | M2M_ATE_FW_IS_UP_VALUE (0xD75DC1C3) /*Also, Change this value in ATE (Burst) firmware if it will be changed here*/ |
#define | M2M_ATE_FW_START_VALUE (0x3C1CD57D) /*Also, Change this value in boot_firmware if it will be changed here*/ |
#define | M2M_FINISH_BOOT_ROM 0x10add09eUL |
#define | M2M_FINISH_INIT_STATE 0x02532636UL |
#define | M2M_START_FIRMWARE 0xef522f61UL |
#define | M2M_START_PS_FIRMWARE 0x94992610UL |
#define | M2M_WAIT_FOR_HOST_REG (0x207bc) |
#define | NMI_CHIPID (NMI_PERIPH_REG_BASE) |
#define | NMI_PERIPH_REG_BASE 0x1000 |
#define | NMI_REV_REG (0x207ac) /*Also, Used to load ATE firmware from SPI Flash and to ensure that it is running too*/ |
#define | NMI_STATE_REG (0x108c) |
#define | REV(id) ( ((id) & 0x00000fff ) ) |
#define | REV_2B0 (0x2B0) |
#define | REV_3A0 (0x3A0) |
#define | REV_B0 (0x2B0) |
#define | rHAVE_ETHERNET_MODE_BIT (NBIT7) |
#define | rHAVE_EXT_PA_INV_TX_RX (NBIT4) |
#define | rHAVE_LEGACY_RF_SETTINGS (NBIT5) |
#define | rHAVE_LOGS_DISABLED_BIT (NBIT6) |
#define | rHAVE_SDIO_IRQ_GPIO_BIT (NBIT0) |
#define | rHAVE_SLEEP_CLK_SRC_RTC_BIT (NBIT2) |
#define | rHAVE_SLEEP_CLK_SRC_XO_BIT (NBIT3) |
#define | rHAVE_USE_PMU_BIT (NBIT1) |
#define | rNMI_BOOT_RESET_MUX (0x1118) |
#define | rNMI_GLB_RESET (0x1400) |
#define | rNMI_GP_REG_0 (0x149c) |
#define | rNMI_GP_REG_1 (0x14A0) |
Functions | |
sint8 | chip_apply_conf (uint32 u32conf) |
sint8 | chip_deinit (void) |
void | chip_idle (void) |
sint8 | chip_reset (void) |
sint8 | chip_reset_and_cpu_halt (void) |
sint8 | chip_sleep (void) |
sint8 | chip_wake (void) |
sint8 | cpu_start (void) |
sint8 | enable_interrupts (void) |
void | enable_rf_blocks (void) |
sint8 | get_gpio_val (uint8 gpio, uint8 *val) |
sint8 | nm_clkless_wake (void) |
Wakeup the chip using clockless registers. More... | |
uint32 | nmi_get_chipid (void) |
sint8 | nmi_get_mac_address (uint8 *pu8MacAddr) |
sint8 | nmi_get_otp_mac_address (uint8 *pu8MacAddr, uint8 *pu8IsValid) |
uint32 | nmi_get_rfrevid (void) |
void | nmi_set_sys_clk_src_to_xo (void) |
void | nmi_update_pll (void) |
sint8 | pullup_ctrl (uint32 pinmask, uint8 enable) |
void | restore_pmu_settings_after_global_reset (void) |
sint8 | set_gpio_dir (uint8 gpio, uint8 dir) |
sint8 | set_gpio_val (uint8 gpio, uint8 val) |
sint8 | wait_for_bootrom (uint8) |
sint8 | wait_for_firmware_start (uint8) |
#define BOOTROM_REG (0xc000c) |
Referenced by chip_reset_and_cpu_halt(), cpu_start(), and wait_for_bootrom().
#define CHIP_ID_3000D (0x3000D0) |
#define EFUSED_MAC | ( | value | ) | (value & 0xffff0000) |
Referenced by nmi_get_otp_mac_address().
#define GET_CHIPID | ( | ) | nmi_get_chipid() |
Referenced by nm_drv_init_download_mode().
#define ISNMC1000 | ( | id | ) | (((id & 0xfffff000) == 0x100000) ? 1 : 0) |
#define ISNMC1500 | ( | id | ) | (((id & 0xfffff000) == 0x150000) ? 1 : 0) |
#define ISNMC3400 | ( | id | ) | (((id & 0xfff0f000) == 0x300000) ? 1 : 0) |
Referenced by hif_send(), and hif_set_rx_done().
#define M2M_ATE_FW_IS_UP_VALUE (0xD75DC1C3) /*Also, Change this value in ATE (Burst) firmware if it will be changed here*/ |
Referenced by nm_get_firmware_info(), and wait_for_firmware_start().
#define M2M_ATE_FW_START_VALUE (0x3C1CD57D) /*Also, Change this value in boot_firmware if it will be changed here*/ |
Referenced by wait_for_bootrom(), and wait_for_firmware_start().
#define M2M_FINISH_BOOT_ROM 0x10add09eUL |
Referenced by wait_for_bootrom().
#define M2M_FINISH_INIT_STATE 0x02532636UL |
Referenced by wait_for_firmware_start().
#define M2M_START_FIRMWARE 0xef522f61UL |
Referenced by wait_for_bootrom().
#define M2M_START_PS_FIRMWARE 0x94992610UL |
#define M2M_WAIT_FOR_HOST_REG (0x207bc) |
Referenced by wait_for_bootrom().
#define NMI_CHIPID (NMI_PERIPH_REG_BASE) |
#define NMI_PERIPH_REG_BASE 0x1000 |
#define NMI_REV_REG (0x207ac) /*Also, Used to load ATE firmware from SPI Flash and to ensure that it is running too*/ |
#define NMI_STATE_REG (0x108c) |
Referenced by chip_reset_and_cpu_halt(), cpu_start(), hif_send(), wait_for_bootrom(), and wait_for_firmware_start().
#define REV | ( | id | ) | ( ((id) & 0x00000fff ) ) |
Referenced by restore_pmu_settings_after_global_reset(), spi_flash_enable(), and wait_for_bootrom().
#define REV_2B0 (0x2B0) |
Referenced by restore_pmu_settings_after_global_reset().
#define REV_3A0 (0x3A0) |
Referenced by spi_flash_enable(), and wait_for_bootrom().
#define REV_B0 (0x2B0) |
#define rHAVE_ETHERNET_MODE_BIT (NBIT7) |
Referenced by wait_for_bootrom().
#define rHAVE_EXT_PA_INV_TX_RX (NBIT4) |
Referenced by chip_apply_conf().
#define rHAVE_LEGACY_RF_SETTINGS (NBIT5) |
Referenced by chip_apply_conf().
#define rHAVE_LOGS_DISABLED_BIT (NBIT6) |
Referenced by chip_apply_conf().
#define rHAVE_SDIO_IRQ_GPIO_BIT (NBIT0) |
#define rHAVE_SLEEP_CLK_SRC_RTC_BIT (NBIT2) |
Referenced by chip_apply_conf().
#define rHAVE_SLEEP_CLK_SRC_XO_BIT (NBIT3) |
Referenced by chip_apply_conf().
#define rHAVE_USE_PMU_BIT (NBIT1) |
Referenced by chip_apply_conf(), and wait_for_bootrom().
#define rNMI_BOOT_RESET_MUX (0x1118) |
#define rNMI_GLB_RESET (0x1400) |
#define rNMI_GP_REG_0 (0x149c) |
Referenced by nm_get_firmware_full_info(), nm_get_ota_firmware_info(), nmi_get_mac_address(), and nmi_get_otp_mac_address().
#define rNMI_GP_REG_1 (0x14A0) |
Referenced by chip_apply_conf().
sint8 chip_deinit | ( | void | ) |
stop the firmware, need a re-download
stop the firmware, need a re-download
void chip_idle | ( | void | ) |
sint8 chip_reset | ( | void | ) |
sint8 chip_reset_and_cpu_halt | ( | void | ) |
sint8 chip_sleep | ( | void | ) |
sint8 chip_wake | ( | void | ) |
sint8 cpu_start | ( | void | ) |
reset regs
Go...
reset regs
Go...
sint8 enable_interrupts | ( | void | ) |
interrupt pin mux select
interrupt enable
interrupt pin mux select
interrupt enable
void enable_rf_blocks | ( | void | ) |
References nm_bsp_sleep(), and nm_write_reg().
nm_clkless_wake | ( | void | ) |
Wakeup the chip using clockless registers.
uint32 nmi_get_chipid | ( | void | ) |
uint32 nmi_get_rfrevid | ( | void | ) |
void nmi_set_sys_clk_src_to_xo | ( | void | ) |
void nmi_update_pll | ( | void | ) |
void restore_pmu_settings_after_global_reset | ( | void | ) |