Microchip® Advanced Software Framework

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Defines

Macros

#define BOOT_START   0x12345678UL
 
#define BOOT_SUCCESS   0x10add09eUL
 
#define BYTE_0(word)   ((uint8)(((word) >> 0) & 0x000000FFUL))
 
#define BYTE_1(word)   ((uint8)(((word) >> 8) & 0x000000FFUL))
 
#define BYTE_2(word)   ((uint8)(((word) >> 16) & 0x000000FFUL))
 
#define BYTE_3(word)   ((uint8)(((word) >> 24) & 0x000000FFUL))
 
#define DATA_PKT_OFFSET   4
 
#define ERR_FIRMWARE_EXCEED_SIZE   0xE5UL
 
#define ERR_PREFIX_NMIS   0xE4UL
 
#define I2C_ERR_LARGE_ADDRESS   0xE1UL
 
#define I2C_ERR_OVER_SIZE   0xE3UL
 
#define I2C_ERR_TX_ABRT   0xE2UL
 
#define M2M_ACK   ((sint8)-11)
 
#define M2M_ERR_BUS_FAIL   ((sint8)-6)
 
#define M2M_ERR_FAIL   ((sint8)-12)
 
#define M2M_ERR_FIRMWARE   ((sint8)-8)
 
#define M2M_ERR_FIRMWARE_bURN   ((sint8)-10)
 
#define M2M_ERR_FW_VER_MISMATCH   ((sint8)-13)
 
#define M2M_ERR_INIT   ((sint8)-5)
 
#define M2M_ERR_INVALID   ((sint8)-16)
 
#define M2M_ERR_INVALID_ARG   ((sint8)-15)
 
#define M2M_ERR_MEM_ALLOC   ((sint8)-3)
 
#define M2M_ERR_RCV   ((sint8)-2)
 
#define M2M_ERR_SCAN_IN_PROGRESS   ((sint8)-14)
 
#define M2M_ERR_SEND   ((sint8)-1)
 
#define M2M_ERR_TIME_OUT   ((sint8)-4)
 
#define M2M_MAX(A, B)   ((A) > (B) ? (A) : (B))
 
#define M2M_NOT_YET   ((sint8)-7)
 
#define M2M_SEL(x, m1, m2, m3)   ((x>1)?((x>2)?(m3):(m2)):(m1))
 
#define M2M_SPI_FAIL   ((sint8)-9)
 
#define M2M_SUCCESS   ((sint8)0)
 
#define M2M_TIME_OUT_DELAY   10000
 
#define NBIT0   (0x00000001)
 
#define NBIT1   (0x00000002)
 
#define NBIT10   (0x00000400)
 
#define NBIT11   (0x00000800)
 
#define NBIT12   (0x00001000)
 
#define NBIT13   (0x00002000)
 
#define NBIT14   (0x00004000)
 
#define NBIT15   (0x00008000)
 
#define NBIT16   (0x00010000)
 
#define NBIT17   (0x00020000)
 
#define NBIT18   (0x00040000)
 
#define NBIT19   (0x00080000)
 
#define NBIT2   (0x00000004)
 
#define NBIT20   (0x00100000)
 
#define NBIT21   (0x00200000)
 
#define NBIT22   (0x00400000)
 
#define NBIT23   (0x00800000)
 
#define NBIT24   (0x01000000)
 
#define NBIT25   (0x02000000)
 
#define NBIT26   (0x04000000)
 
#define NBIT27   (0x08000000)
 
#define NBIT28   (0x10000000)
 
#define NBIT29   (0x20000000)
 
#define NBIT3   (0x00000008)
 
#define NBIT30   (0x40000000)
 
#define NBIT31   (0x80000000)
 
#define NBIT4   (0x00000010)
 
#define NBIT5   (0x00000020)
 
#define NBIT6   (0x00000040)
 
#define NBIT7   (0x00000080)
 
#define NBIT8   (0x00000100)
 
#define NBIT9   (0x00000200)
 
#define PROGRAM_START   0x26961735UL
 
#define WORD_ALIGN(val)   (((val) & 0x03) ? ((val) + 4 - ((val) & 0x03)) : (val))
 

#define BOOT_START   0x12345678UL
#define BOOT_SUCCESS   0x10add09eUL
#define BYTE_0 (   word)    ((uint8)(((word) >> 0) & 0x000000FFUL))

Most significant byte of 32bit word (LE)

Referenced by m2m_wifi_cb(), MD4_Hash(), and MD5_HashSW().

#define BYTE_1 (   word)    ((uint8)(((word) >> 8) & 0x000000FFUL))

Second most significant byte of 32bit word (LE)

Referenced by m2m_wifi_cb(), MD4_Hash(), and MD5_HashSW().

#define BYTE_2 (   word)    ((uint8)(((word) >> 16) & 0x000000FFUL))

Third most significant byte of 32bit word (LE)

Referenced by m2m_wifi_cb(), MD4_Hash(), and MD5_HashSW().

#define BYTE_3 (   word)    ((uint8)(((word) >> 24) & 0x000000FFUL))

Least significant byte of 32bit word (LE)

Referenced by m2m_wifi_cb(), MD4_Hash(), and MD5_HashSW().

#define DATA_PKT_OFFSET   4
#define ERR_FIRMWARE_EXCEED_SIZE   0xE5UL

Total size of firmware exceeds the max size 256k.

#define ERR_PREFIX_NMIS   0xE4UL

Wrong first four bytes in flash NMIS.

#define I2C_ERR_LARGE_ADDRESS   0xE1UL

The address exceeds the max addressing mode in I2C flash.

#define I2C_ERR_OVER_SIZE   0xE3UL
#define I2C_ERR_TX_ABRT   0xE2UL

NO ACK from slave.

#define M2M_ACK   ((sint8)-11)
#define M2M_ERR_BUS_FAIL   ((sint8)-6)

Referenced by hif_isr(), and nm_bus_init().

#define M2M_ERR_FIRMWARE   ((sint8)-8)
#define M2M_ERR_FIRMWARE_bURN   ((sint8)-10)
#define M2M_ERR_FW_VER_MISMATCH   ((sint8)-13)
#define M2M_ERR_INVALID   ((sint8)-16)
#define M2M_ERR_RCV   ((sint8)-2)

Referenced by hif_isr().

#define M2M_ERR_SCAN_IN_PROGRESS   ((sint8)-14)
#define M2M_ERR_SEND   ((sint8)-1)

Referenced by hif_send().

#define M2M_ERR_TIME_OUT   ((sint8)-4)

Referenced by chip_wake().

#define M2M_MAX (   A,
 
)    ((A) > (B) ? (A) : (B))

Maximum of two values

Referenced by TlsSrvSecFopen().

#define M2M_NOT_YET   ((sint8)-7)
#define M2M_SEL (   x,
  m1,
  m2,
  m3 
)    ((x>1)?((x>2)?(m3):(m2)):(m1))

Choose one of three values

#define M2M_SPI_FAIL   ((sint8)-9)
#define M2M_SUCCESS   ((sint8)0)

Referenced by BuildServerX509CertChain(), Cert_DecodeValidity(), certificate_download(), chip_apply_conf(), chip_deinit(), chip_reset(), chip_reset_and_cpu_halt(), chip_sleep(), chip_wake(), CryptoDecodeRsaPrivKey(), CryptoX509CertDecode(), DecodeBase64File(), EcdsaBuildServerX509CertChain(), enable_disable_ap_mode(), enable_interrupts(), enter_wifi_firmware_download(), get_gpio_val(), GetRootCertificate(), gpio_ioctl(), hexstr_2_bytes(), hif_chip_sleep(), hif_chip_sleep_sc(), hif_chip_wake(), hif_deinit(), hif_handle_isr(), hif_init(), hif_isr(), hif_receive(), hif_register_cb(), hif_send(), hif_set_rx_done(), m2m_ip_cb(), m2m_ota_abort(), m2m_ota_cb(), m2m_ota_get_firmware_version(), m2m_ota_host_file_get(), m2m_ota_host_file_read_hif(), m2m_ota_host_file_read_spi(), m2m_ota_init(), m2m_ota_notif_check_for_update(), m2m_ota_notif_sched(), m2m_ota_notif_set_url(), m2m_ota_rollback(), m2m_ota_start_update(), m2m_ota_switch_firmware(), m2m_ssl_cb(), m2m_ssl_handshake_rsp(), m2m_ssl_init(), m2m_ssl_retrieve_hash(), m2m_ssl_retrieve_next_for_verifying(), m2m_ssl_send_certs_to_winc(), m2m_ssl_set_active_ciphersuites(), m2m_validate_ap_parameters(), m2m_validate_scan_options(), m2m_wifi_1x_get_option(), m2m_wifi_1x_set_option(), m2m_wifi_cb(), m2m_wifi_connect_1x_mschap2(), m2m_wifi_connect_1x_tls(), m2m_wifi_connect_open(), m2m_wifi_connect_prepare_msg(), m2m_wifi_connect_psk(), m2m_wifi_connect_wep(), m2m_wifi_deinit(), m2m_wifi_disable_ap(), m2m_wifi_download_mode(), m2m_wifi_enable_ap_ext(), m2m_wifi_enable_firmware_logs(), m2m_wifi_get_firmware_version(), m2m_wifi_get_mac_address(), m2m_wifi_get_otp_mac_address(), m2m_wifi_init(), m2m_wifi_init_hold(), m2m_wifi_init_start(), m2m_wifi_p2p(), m2m_wifi_p2p_disconnect(), m2m_wifi_reinit(), m2m_wifi_req_client_ctrl(), m2m_wifi_req_curr_rssi(), m2m_wifi_req_scan_result(), m2m_wifi_req_server_init(), m2m_wifi_request_scan(), m2m_wifi_request_scan_passive(), m2m_wifi_request_scan_ssid_list(), m2m_wifi_request_sleep(), m2m_wifi_set_battery_voltage(), m2m_wifi_set_gain_table_idx(), m2m_wifi_set_power_profile(), m2m_wifi_set_scan_options(), m2m_wifi_set_sleep_mode(), m2m_wifi_set_tx_power(), m2m_wifi_start_provision_mode_ext(), m2m_wifi_wps_disable(), main(), nm_bsp_deinit(), nm_bsp_init(), nm_bus_deinit(), nm_bus_iface_deinit(), nm_bus_iface_init(), nm_bus_iface_reconfigure(), nm_bus_init(), nm_bus_reinit(), nm_bus_reset(), nm_drv_deinit(), nm_drv_init(), nm_drv_init_download_mode(), nm_drv_init_hold(), nm_drv_init_start(), nm_get_firmware_full_info(), nm_get_firmware_info(), nm_get_ota_firmware_info(), nm_read_block(), nm_write_block(), nmi_get_chipid(), nmi_get_mac_address(), nmi_get_otp_mac_address(), nmi_get_rfrevid(), ParseRsaPrivKey(), pullup_ctrl(), ReadServerX509Chain(), RsaBuildServerX509CertChain(), set_gpio_dir(), set_gpio_val(), Socket_ReadSocketData(), spi_flash_enable(), spi_flash_erase(), spi_flash_load_to_cortus_mem(), spi_flash_page_program(), spi_flash_pp(), spi_flash_rdid(), spi_flash_read(), spi_flash_read_internal(), spi_flash_read_status_reg(), spi_flash_sector_erase(), spi_flash_write(), spi_flash_write_disable(), spi_flash_write_enable(), spi_flexible_flash_find_section(), TlsSrvSecFwrite(), ValidateKeyMaterial(), wait_for_bootrom(), wait_for_firmware_start(), wifi_ap_provision(), wifi_cb(), WriteRootCertificate(), WriteTlsCertificate(), and WriteTlsServerKeyMaterial().

#define M2M_TIME_OUT_DELAY   10000
#define NBIT0   (0x00000001)

Referenced by chip_sleep(), chip_wake(), and hif_isr().

#define NBIT1   (0x00000002)
#define NBIT10   (0x00000400)
#define NBIT11   (0x00000800)
#define NBIT12   (0x00001000)
#define NBIT13   (0x00002000)
#define NBIT14   (0x00004000)
#define NBIT15   (0x00008000)
#define NBIT16   (0x00010000)
#define NBIT17   (0x00020000)
#define NBIT18   (0x00040000)
#define NBIT19   (0x00080000)
#define NBIT2   (0x00000004)

Referenced by chip_wake(), and hif_send().

#define NBIT20   (0x00100000)

Referenced by wait_for_bootrom().

#define NBIT21   (0x00200000)
#define NBIT22   (0x00400000)
#define NBIT23   (0x00800000)
#define NBIT24   (0x01000000)
#define NBIT25   (0x02000000)
#define NBIT26   (0x04000000)
#define NBIT27   (0x08000000)
#define NBIT28   (0x10000000)
#define NBIT29   (0x20000000)
#define NBIT3   (0x00000008)

Referenced by hif_send().

#define NBIT30   (0x40000000)
#define NBIT31   (0x80000000)
#define NBIT4   (0x00000010)
#define NBIT5   (0x00000020)
#define NBIT6   (0x00000040)
#define NBIT7   (0x00000080)

Referenced by hif_send().

#define NBIT8   (0x00000100)
#define NBIT9   (0x00000200)
#define PROGRAM_START   0x26961735UL
#define WORD_ALIGN (   val)    (((val) & 0x03) ? ((val) + 4 - ((val) & 0x03)) : (val))