nmasic.h File Reference

This module contains NMC1500 ASIC specific internal APIs.

Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.

#include "common/include/nm_common.h"

Data Structures
struct	tstrGpRegs

Macros
#define	BOOTROM_REG   (0xc000c)
#define	EFUSED_MAC(value)   (value & 0xffff0000)
#define	GET_CHIPID()   nmi_get_chipid()
#define	ISNMC1000(id)   ((((id) & 0xfffff000) == 0x100000) ? 1 : 0)
#define	ISNMC1500(id)   ((((id) & 0xfffff000) == 0x150000) ? 1 : 0)
#define	ISNMC3000(id)   ((((id) & 0xfff00000) == 0x300000) ? 1 : 0)
#define	M2M_ATE_FW_IS_UP_VALUE   (0xD75DC1C3) /*Also, Change this value in ATE (Burst) firmware if it will be changed here*/
#define	M2M_ATE_FW_START_VALUE   (0x3C1CD57D) /*Also, Change this value in boot_firmware if it will be changed here*/
#define	M2M_FINISH_BOOT_ROM   0x10add09eUL
#define	M2M_FINISH_INIT_STATE   0x02532636UL
#define	M2M_START_FIRMWARE   0xef522f61UL
#define	M2M_START_PS_FIRMWARE   0x94992610UL
#define	M2M_WAIT_FOR_HOST_REG   (0x207bc)
#define	NMI_CHIPID   (NMI_PERIPH_REG_BASE)
#define	NMI_PERIPH_REG_BASE   0x1000
#define	NMI_REV_REG   (0x207ac) /*Also, Used to load ATE firmware from SPI Flash and to ensure that it is running too*/
#define	NMI_REV_REG_ATE   (0x1048) /*Revision info register in case of ATE FW*/
#define	NMI_STATE_REG   (0x108c)
#define	REV(id)   (((id) & 0x00000fff ))
#define	REV_2B0   (0x2B0)
#define	REV_3A0   (0x3A0)
#define	REV_B0   (0x2B0)
#define	rHAVE_ETHERNET_MODE_BIT   (NBIT7)
#define	rHAVE_EXT_PA_INV_TX_RX   (NBIT4)
#define	rHAVE_LEGACY_RF_SETTINGS   (NBIT5)
#define	rHAVE_LOGS_DISABLED_BIT   (NBIT6)
#define	rHAVE_RESERVED1_BIT   (NBIT8)
#define	rHAVE_RESERVED2_BIT   (NBIT9)
#define	rHAVE_SDIO_IRQ_GPIO_BIT   (NBIT0)
#define	rHAVE_SLEEP_CLK_SRC_RTC_BIT   (NBIT2)
#define	rHAVE_SLEEP_CLK_SRC_XO_BIT   (NBIT3)
#define	rHAVE_USE_PMU_BIT   (NBIT1)
#define	rHAVE_XO_XTALGM2_DIS_BIT   (NBIT10)
#define	rNMI_BOOT_RESET_MUX   (0x1118)
#define	rNMI_GLB_RESET   (0x1400)
#define	rNMI_GP_REG_0   (0x149c)
#define	rNMI_GP_REG_1   (0x14A0)
#define	rNMI_GP_REG_2   (0xc0008)

Functions
sint8	chip_apply_conf (uint32 u32conf)
sint8	chip_deinit (void)
void	chip_idle (void)
sint8	chip_reset (void)
sint8	chip_reset_and_cpu_halt (void)
sint8	chip_sleep (void)
sint8	chip_wake (void)
sint8	cpu_halt (void)
sint8	cpu_start (void)
sint8	enable_interrupts (void)
sint8	get_gpio_val (uint8 gpio, uint8 *val)
uint32	nmi_get_chipid (void)
sint8	nmi_get_mac_address (uint8 *pu8MacAddr)
sint8	nmi_get_otp_mac_address (uint8 *pu8MacAddr, uint8 *pu8IsValid)
uint32	nmi_get_rfrevid (void)
void	nmi_set_sys_clk_src_to_xo (void)
void	nmi_update_pll (void)
sint8	pullup_ctrl (uint32 pinmask, uint8 enable)
void	restore_pmu_settings_after_global_reset (void)
sint8	set_gpio_dir (uint8 gpio, uint8 dir)
sint8	set_gpio_val (uint8 gpio, uint8 val)
sint8	wait_for_bootrom (uint8)
sint8	wait_for_firmware_start (uint8)

#define BOOTROM_REG   (0xc000c)

Referenced by cpu_start(), and wait_for_bootrom().

#define EFUSED_MAC

(

value

)

(value & 0xffff0000)

Referenced by nmi_get_otp_mac_address().

#define GET_CHIPID

(

)

nmi_get_chipid()

Referenced by nm_drv_init_download_mode().

#define ISNMC1000

(

id

)

((((id) & 0xfffff000) == 0x100000) ? 1 : 0)

#define ISNMC1500

(

id

)

((((id) & 0xfffff000) == 0x150000) ? 1 : 0)

#define ISNMC3000

(

id

)

((((id) & 0xfff00000) == 0x300000) ? 1 : 0)

Referenced by nm_drv_init_download_mode().

#define M2M_ATE_FW_IS_UP_VALUE   (0xD75DC1C3) /*Also, Change this value in ATE (Burst) firmware if it will be changed here*/

Referenced by nm_get_firmware_info(), and wait_for_firmware_start().

#define M2M_ATE_FW_START_VALUE   (0x3C1CD57D) /*Also, Change this value in boot_firmware if it will be changed here*/

Referenced by wait_for_bootrom().

#define M2M_FINISH_BOOT_ROM   0x10add09eUL

Referenced by wait_for_bootrom().

#define M2M_FINISH_INIT_STATE   0x02532636UL

Referenced by wait_for_firmware_start().

#define M2M_START_FIRMWARE   0xef522f61UL

Referenced by wait_for_bootrom().

#define M2M_START_PS_FIRMWARE   0x94992610UL

#define M2M_WAIT_FOR_HOST_REG   (0x207bc)

Referenced by wait_for_bootrom().

#define NMI_CHIPID   (NMI_PERIPH_REG_BASE)

#define NMI_PERIPH_REG_BASE   0x1000

#define NMI_REV_REG   (0x207ac) /*Also, Used to load ATE firmware from SPI Flash and to ensure that it is running too*/

Referenced by cpu_start(), nm_get_firmware_info(), wait_for_bootrom(), and wait_for_firmware_start().

#define NMI_REV_REG_ATE   (0x1048) /*Revision info register in case of ATE FW*/

Referenced by nm_get_firmware_info().

#define NMI_STATE_REG   (0x108c)

Referenced by cpu_start(), hif_send(), wait_for_bootrom(), and wait_for_firmware_start().

#define REV

(

id

)

(((id) & 0x00000fff ))

Referenced by restore_pmu_settings_after_global_reset(), spi_flash_enable(), and wait_for_bootrom().

#define REV_2B0   (0x2B0)

Referenced by restore_pmu_settings_after_global_reset().

#define REV_3A0   (0x3A0)

Referenced by spi_flash_enable(), and wait_for_bootrom().

#define REV_B0   (0x2B0)

#define rHAVE_ETHERNET_MODE_BIT   (NBIT7)

Referenced by wait_for_bootrom().

#define rHAVE_EXT_PA_INV_TX_RX   (NBIT4)

Referenced by chip_apply_conf().

#define rHAVE_LEGACY_RF_SETTINGS   (NBIT5)

Referenced by chip_apply_conf().

#define rHAVE_LOGS_DISABLED_BIT   (NBIT6)

Referenced by chip_apply_conf().

#define rHAVE_RESERVED1_BIT   (NBIT8)

Referenced by chip_apply_conf().

#define rHAVE_RESERVED2_BIT   (NBIT9)

#define rHAVE_SDIO_IRQ_GPIO_BIT   (NBIT0)

#define rHAVE_SLEEP_CLK_SRC_RTC_BIT   (NBIT2)

Referenced by chip_apply_conf().

#define rHAVE_SLEEP_CLK_SRC_XO_BIT   (NBIT3)

Referenced by chip_apply_conf().

#define rHAVE_USE_PMU_BIT   (NBIT1)

Referenced by chip_apply_conf(), and wait_for_bootrom().

#define rHAVE_XO_XTALGM2_DIS_BIT   (NBIT10)

Referenced by chip_apply_conf().

#define rNMI_BOOT_RESET_MUX   (0x1118)

#define rNMI_GLB_RESET   (0x1400)

#define rNMI_GP_REG_0   (0x149c)

#define rNMI_GP_REG_1   (0x14A0)

Referenced by chip_apply_conf().

#define rNMI_GP_REG_2   (0xc0008)

Referenced by nm_get_firmware_full_info(), nm_get_ota_firmware_info(), nmi_get_mac_address(), and nmi_get_otp_mac_address().

sint8 chip_apply_conf

(

uint32

u32conf

)

References M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_reg(), rHAVE_EXT_PA_INV_TX_RX, rHAVE_LEGACY_RF_SETTINGS, rHAVE_LOGS_DISABLED_BIT, rHAVE_RESERVED1_BIT, rHAVE_SLEEP_CLK_SRC_RTC_BIT, rHAVE_SLEEP_CLK_SRC_XO_BIT, rHAVE_USE_PMU_BIT, rHAVE_XO_XTALGM2_DIS_BIT, and rNMI_GP_REG_1.

Referenced by wait_for_bootrom().

sint8 chip_deinit

(

void

)

stop the firmware, need a re-download

References M2M_ERR, M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_reg(), and NMI_GLB_RESET_0.

Referenced by nm_drv_deinit().

void chip_idle

(

void

)

References NBIT1, nm_read_reg_with_ret(), nm_write_reg(), and WAKE_CLK_REG.

sint8 chip_reset

(

void

)

References M2M_SUCCESS, nm_bsp_sleep(), nm_write_reg(), and NMI_GLB_RESET_0.

Referenced by chip_reset_and_cpu_halt(), and nm_drv_init_hold().

sint8 chip_reset_and_cpu_halt

(

void

)

References chip_reset(), chip_wake(), cpu_halt(), and M2M_SUCCESS.

Referenced by nm_drv_init_download_mode().

sint8 chip_sleep

(

void

)

References CORT_HOST_COMM, HOST_CORT_COMM, M2M_SUCCESS, NBIT0, NBIT1, nm_read_reg_with_ret(), nm_write_reg(), and WAKE_CLK_REG.

Referenced by hif_chip_sleep().

sint8 chip_wake

(

void

)

References CLOCKS_EN_REG, HOST_CORT_COMM, M2M_ERR, M2M_ERR_TIME_OUT, M2M_SUCCESS, NBIT0, NBIT1, NBIT2, nm_bsp_sleep(), nm_bus_reset(), nm_read_reg_with_ret(), nm_write_reg(), WAKE_CLK_REG, and WAKUP_TRAILS_TIMEOUT.

Referenced by chip_reset_and_cpu_halt(), hif_chip_wake(), and nm_drv_init_hold().

sint8 cpu_halt

(

void

)

References nm_read_reg_with_ret(), nm_write_reg(), and NMI_GLB_RESET_0.

Referenced by chip_reset_and_cpu_halt().

sint8 cpu_start

(

void

)

reset regs

Go...

References BOOTROM_REG, nm_bsp_sleep(), nm_read_reg_with_ret(), nm_write_reg(), NMI_GLB_RESET_0, NMI_REV_REG, and NMI_STATE_REG.

sint8 enable_interrupts

(

void

)

interrupt pin mux select

interrupt enable

References M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_reg(), NMI_INTR_ENABLE, and NMI_PIN_MUX_0.

Referenced by m2m_wifi_download_mode(), and nm_drv_init_start().

sint8 get_gpio_val	(	uint8	gpio,
		uint8 *	val
	)

References M2M_SUCCESS, and nm_read_reg_with_ret().

Referenced by gpio_ioctl().

uint32 nmi_get_chipid

(

void

)

References M2M_SUCCESS, and nm_read_reg_with_ret().

Referenced by main(), nm_drv_init_download_mode(), nm_drv_init_hold(), nm_get_firmware_info(), restore_pmu_settings_after_global_reset(), spi_flash_enable(), and wait_for_bootrom().

sint8 nmi_get_mac_address

(

uint8 *

pu8MacAddr

)

References m2m_memcpy(), M2M_SUCCESS, nm_read_block(), nm_read_reg_with_ret(), rNMI_GP_REG_2, and tstrGpRegs::u32Mac_efuse_mib.

Referenced by m2m_wifi_get_mac_address().

sint8 nmi_get_otp_mac_address	(	uint8 *	pu8MacAddr,
		uint8 *	pu8IsValid
	)

References EFUSED_MAC, M2M_DBG, m2m_memcpy(), m2m_memset(), M2M_SUCCESS, nm_read_block(), nm_read_reg_with_ret(), rNMI_GP_REG_2, and tstrGpRegs::u32Mac_efuse_mib.

Referenced by m2m_wifi_get_otp_mac_address().

uint32 nmi_get_rfrevid

(

void

)

References M2M_SUCCESS, and nm_read_reg_with_ret().

Referenced by main().

void nmi_set_sys_clk_src_to_xo

(

void

)

References nm_read_reg(), nm_write_reg(), and nmi_update_pll().

void nmi_update_pll

(

void

)

References nm_read_reg(), and nm_write_reg().

Referenced by nmi_set_sys_clk_src_to_xo().

sint8 pullup_ctrl	(	uint32	pinmask,
		uint8	enable
	)

References M2M_ERR, M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().

Referenced by m2m_periph_pullup_ctrl().

void restore_pmu_settings_after_global_reset

(

void

)

References nm_write_reg(), nmi_get_chipid(), REV, and REV_2B0.

sint8 set_gpio_dir	(	uint8	gpio,
		uint8	dir
	)

References M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().

Referenced by gpio_ioctl().

sint8 set_gpio_val	(	uint8	gpio,
		uint8	val
	)

References M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().

Referenced by gpio_ioctl().

sint8 wait_for_bootrom

(

uint8

)

References BOOTROM_REG, chip_apply_conf(), cnt, M2M_ATE_FW_START_VALUE, M2M_DBG, M2M_ERR_INIT, M2M_FINISH_BOOT_ROM, M2M_INFO, M2M_MAKE_VERSION_INFO, M2M_MIN_REQ_DRV_VERSION_MAJOR_NO, M2M_MIN_REQ_DRV_VERSION_MINOR_NO, M2M_MIN_REQ_DRV_VERSION_PATCH_NO, M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO, M2M_START_FIRMWARE, M2M_SUCCESS, M2M_WAIT_FOR_HOST_REG, M2M_WIFI_MODE_ATE_HIGH, M2M_WIFI_MODE_ATE_LOW, M2M_WIFI_MODE_ETHERNET, NBIT20, nm_bsp_sleep(), nm_read_reg(), nm_write_reg(), nmi_get_chipid(), NMI_REV_REG, NMI_STATE_REG, REV, REV_3A0, rHAVE_ETHERNET_MODE_BIT, rHAVE_USE_PMU_BIT, and TIMEOUT.

Referenced by nm_drv_init_start().

sint8 wait_for_firmware_start

(

uint8

)

References cnt, M2M_ATE_FW_IS_UP_VALUE, M2M_DBG, M2M_ERR_INIT, M2M_FINISH_INIT_STATE, M2M_SUCCESS, M2M_WIFI_MODE_ATE_HIGH, M2M_WIFI_MODE_ATE_LOW, nm_bsp_sleep(), nm_read_reg(), nm_write_reg(), NMI_REV_REG, NMI_STATE_REG, and TIMEOUT.

Referenced by nm_drv_init_start().