PHY Layer Configuration for ATPL230.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
#include "compiler.h"
Data Structures | |
struct | atpl230Cfg_t |
Functions | |
void | phy_init_adc_cfg (void) |
void | phy_init_cfg (void) |
This function initiates PRIME PHY layer configuration and it must be implemented externally by the user. More... | |
void | phy_init_channel_cfg (void) |
This function initiates PRIME PHY layer attenuation and threshold parameters depending on channel configuration. More... | |
void | phy_init_coupling_cfg (void) |
This function initiates PRIME Coupling Board configuration and it must be implemented externally by the user. More... | |
Variables | |
atpl230Cfg_t | atpl230Cfg |
void phy_init_adc_cfg | ( | void | ) |
void phy_init_cfg | ( | void | ) |
This function initiates PRIME PHY layer configuration and it must be implemented externally by the user.
References atpl230Cfg_t::agc0KrssiOffset, atpl230Cfg_t::agc1KrssiOffset, atpl230Cfg_t::agc2KrssiOffset, atpl230Cfg_t::agc3KrssiOffset, atpl230Cfg, atpl230Cfg_t::atplCoupling, atpl230Cfg_t::autoDetectBranch, BOARD_COUPLING, HI_STATE, atpl230Cfg_t::impedance, atpl230Cfg_t::rxCorrThreshold, atpl230Cfg_t::timeAfterTxHighZ, atpl230Cfg_t::timeAfterTxLowZ, atpl230Cfg_t::timeBeforeTxHighZ, and atpl230Cfg_t::timeBeforeTxLowZ.
Referenced by _init_phy_layer().
void phy_init_channel_cfg | ( | void | ) |
This function initiates PRIME PHY layer attenuation and threshold parameters depending on channel configuration.
References atpl230Cfg, ATPLCOUP000_v1, ATPLCOUP000_v2, ATPLCOUP001_v1, ATPLCOUP002_v1, ATPLCOUP002_v2, ATPLCOUP003_v1, ATPLCOUP004_v1, ATPLCOUP005_v1, ATPLCOUP006_v1, atpl230Cfg_t::atplCoupling, atpl230ChnCfg_t::tx1AttChirpHighZ, atpl230ChnCfg_t::tx1AttChirpLowZ, atpl230ChnCfg_t::tx1AttChirpVLowZ, atpl230ChnCfg_t::tx1AttSignalHighZ, atpl230ChnCfg_t::tx1AttSignalLowZ, atpl230ChnCfg_t::tx1AttSignalVLowZ, atpl230ChnCfg_t::tx1LoadThreshold1, atpl230ChnCfg_t::tx1LoadThreshold2, atpl230ChnCfg_t::tx1LoadThreshold3, atpl230ChnCfg_t::tx1LoadThreshold4, atpl230ChnCfg_t::tx2AttChirpHighZ, atpl230ChnCfg_t::tx2AttChirpLowZ, atpl230ChnCfg_t::tx2AttChirpVLowZ, atpl230ChnCfg_t::tx2AttSignalHighZ, atpl230ChnCfg_t::tx2AttSignalLowZ, atpl230ChnCfg_t::tx2AttSignalVLowZ, atpl230ChnCfg_t::tx2LoadThreshold1, atpl230ChnCfg_t::tx2LoadThreshold2, atpl230ChnCfg_t::tx2LoadThreshold3, atpl230ChnCfg_t::tx2LoadThreshold4, atpl230ChnCfg_t::tx3AttChirpHighZ, atpl230ChnCfg_t::tx3AttChirpLowZ, atpl230ChnCfg_t::tx3AttChirpVLowZ, atpl230ChnCfg_t::tx3AttSignalHighZ, atpl230ChnCfg_t::tx3AttSignalLowZ, atpl230ChnCfg_t::tx3AttSignalVLowZ, atpl230ChnCfg_t::tx3LoadThreshold1, atpl230ChnCfg_t::tx3LoadThreshold2, atpl230ChnCfg_t::tx3LoadThreshold3, atpl230ChnCfg_t::tx3LoadThreshold4, atpl230ChnCfg_t::tx4AttChirpHighZ, atpl230ChnCfg_t::tx4AttChirpLowZ, atpl230ChnCfg_t::tx4AttChirpVLowZ, atpl230ChnCfg_t::tx4AttSignalHighZ, atpl230ChnCfg_t::tx4AttSignalLowZ, atpl230ChnCfg_t::tx4AttSignalVLowZ, atpl230ChnCfg_t::tx4LoadThreshold1, atpl230ChnCfg_t::tx4LoadThreshold2, atpl230ChnCfg_t::tx4LoadThreshold3, atpl230ChnCfg_t::tx4LoadThreshold4, atpl230ChnCfg_t::tx5AttChirpHighZ, atpl230ChnCfg_t::tx5AttChirpLowZ, atpl230ChnCfg_t::tx5AttChirpVLowZ, atpl230ChnCfg_t::tx5AttSignalHighZ, atpl230ChnCfg_t::tx5AttSignalLowZ, atpl230ChnCfg_t::tx5AttSignalVLowZ, atpl230ChnCfg_t::tx5LoadThreshold1, atpl230ChnCfg_t::tx5LoadThreshold2, atpl230ChnCfg_t::tx5LoadThreshold3, atpl230ChnCfg_t::tx5LoadThreshold4, atpl230ChnCfg_t::tx6AttChirpHighZ, atpl230ChnCfg_t::tx6AttChirpLowZ, atpl230ChnCfg_t::tx6AttChirpVLowZ, atpl230ChnCfg_t::tx6AttSignalHighZ, atpl230ChnCfg_t::tx6AttSignalLowZ, atpl230ChnCfg_t::tx6AttSignalVLowZ, atpl230ChnCfg_t::tx6LoadThreshold1, atpl230ChnCfg_t::tx6LoadThreshold2, atpl230ChnCfg_t::tx6LoadThreshold3, atpl230ChnCfg_t::tx6LoadThreshold4, atpl230ChnCfg_t::tx7AttChirpHighZ, atpl230ChnCfg_t::tx7AttChirpLowZ, atpl230ChnCfg_t::tx7AttChirpVLowZ, atpl230ChnCfg_t::tx7AttSignalHighZ, atpl230ChnCfg_t::tx7AttSignalLowZ, atpl230ChnCfg_t::tx7AttSignalVLowZ, atpl230ChnCfg_t::tx7LoadThreshold1, atpl230ChnCfg_t::tx7LoadThreshold2, atpl230ChnCfg_t::tx7LoadThreshold3, atpl230ChnCfg_t::tx7LoadThreshold4, atpl230ChnCfg_t::tx8AttChirpHighZ, atpl230ChnCfg_t::tx8AttChirpLowZ, atpl230ChnCfg_t::tx8AttChirpVLowZ, atpl230ChnCfg_t::tx8AttSignalHighZ, atpl230ChnCfg_t::tx8AttSignalLowZ, atpl230ChnCfg_t::tx8AttSignalVLowZ, atpl230ChnCfg_t::tx8LoadThreshold1, atpl230ChnCfg_t::tx8LoadThreshold2, atpl230ChnCfg_t::tx8LoadThreshold3, atpl230ChnCfg_t::tx8LoadThreshold4, and atpl230ChnCfg_t::txAttGlobal.
Referenced by _init_phy_layer(), and phy_set_cfg_param().
void phy_init_coupling_cfg | ( | void | ) |
This function initiates PRIME Coupling Board configuration and it must be implemented externally by the user.
ATMEL strongly recommend to consult with technical support to change any parameter in this file.
References atpl230Cfg, ATPLCOUP000_v1, ATPLCOUP000_v2, ATPLCOUP001_v1, ATPLCOUP002_v1, ATPLCOUP002_v2, ATPLCOUP003_v1, ATPLCOUP004_v1, ATPLCOUP005_v1, ATPLCOUP006_v1, atpl230Cfg_t::atplCoupling, atpl230Cfg_t::driver1Mode, atpl230Cfg_t::driver2Mode, DRIVER_1, DRIVER_2, DRV_POL_TX_0_RX_1, atpl230Cfg_t::emit1Active, atpl230Cfg_t::emit2Active, atpl230Cfg_t::emit3Active, atpl230Cfg_t::emit4Active, atpl230Cfg_t::enable_vlow_pk, EXTERNAL_DRV_MODE, atpl230Cfg_t::high_Z_driver, INTERNAL_DRV_MODE, atpl230Cfg_t::low_Z_driver, atpl230Cfg_t::n1Delay, atpl230Cfg_t::n2Delay, atpl230Cfg_t::p1Delay, atpl230Cfg_t::p2Delay, atpl230Cfg_t::txrx1Polarity, atpl230Cfg_t::txrx2Polarity, atpl230Cfg_t::txrxChannel, and atpl230Cfg_t::vlow_Z_driver.
Referenced by _init_phy_layer(), and phy_set_cfg_param().