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Data Structures | Macros | Functions
CANIF - Control Area Network Interface

CANIF is a 32-bit interface for CAN channels.

Data Structures

struct  can_msg_t
 

Macros

#define AVR32_PM_AWEN_CANIF0WEN_MASK   0x02
 
#define AVR32_PM_AWEN_CANIF1WEN_MASK   0x04
 
#define BRP_MAX   64
 
#define BRP_MIN   1
 
#define CANIF_channel_enable_status(ch)   ( (AVR32_CANIF.channel[ch].cansr&AVR32_CANIF_CANSR_CES_MASK) >> AVR32_CANIF_CANSR_CES_OFFSET )
 CANIFSR Register Access. More...
 
#define CANIF_CHANNEL_MODE_LISTENING   1
 
#define CANIF_CHANNEL_MODE_LOOPBACK   2
 
#define CANIF_CHANNEL_MODE_NORMAL   0
 CANIFCFG Register Access. More...
 
#define CANIF_channel_overload_status(ch)   ( (AVR32_CANIF.channel[ch].cansr&AVR32_CANIF_CANSR_OVS_MASK) >> AVR32_CANIF_CANSR_OVS_OFFSET )
 
#define CANIF_channel_receive_status(ch)   ( (AVR32_CANIF.channel[ch].cansr&AVR32_CANIF_CANSR_RS_MASK) >> AVR32_CANIF_CANSR_RS_OFFSET )
 
#define CANIF_channel_transmit_status(ch)   ( (AVR32_CANIF.channel[ch].cansr&AVR32_CANIF_CANSR_TS_MASK) >> AVR32_CANIF_CANSR_TS_OFFSET )
 
#define CANIF_clr_ide(ch, mob)   {(CANIF_mob_get_ptr_data(ch,mob))->ide_bit = 0;}
 
#define CANIF_clr_idemask(ch, mob)   {(CANIF_mob_get_ptr_data(ch,mob))->ide_mask_bit = 0);}
 
#define CANIF_clr_interrupt_status(ch)   { AVR32_CANIF.channel[ch].caniscr = CANIF_get_interrupt_status(ch); }
 
#define CANIF_clr_mob(ch, mob)
 
#define CANIF_clr_overrun_mode(ch)   { AVR32_CANIF.channel[ch].cancfg &= ~(1<<AVR32_CANIF_CANCFG_OVRM_OFFSET); }
 
#define CANIF_clr_reset(ch)   { AVR32_CANIF.channel[ch].canctrl = (0<<AVR32_CANIF_CANCTRL_INIT_OFFSET); }
 
#define CANIF_clr_rtr(ch, mob)   {(CANIF_mob_get_ptr_data(ch,mob))->rtr_bit = 0;}
 
#define CANIF_clr_rtrmask(ch, mob)   {(CANIF_mob_get_ptr_data(ch,mob))->rtr_mask_bit = 0;}
 
#define CANIF_conf_bt(ch)
 
#define CANIF_config_rx(ch, mob)   {CANIF_mob_clr_dir(ch,mob) }
 
#define CANIF_config_tx(ch, mob)   {CANIF_mob_set_dir(ch,mob) }
 
#define CANIF_disable(ch)   { AVR32_CANIF.channel[ch].canctrl &= ~(1<<AVR32_CANIF_CANCTRL_CEN_OFFSET); }
 
#define CANIF_disable_interrupt(ch)
 
#define CANIF_disable_wakeup(ch)   { AVR32_CANIF.channel[ch].canctrl &= ~(1<<AVR32_CANIF_CANCTRL_WKEN_OFFSET); }
 
#define CANIF_disable_wakeup_interrupt(ch)   { AVR32_CANIF.channel[ch].canidr = AVR32_CANIF_CANIDR_WKUPIM_MASK; }
 CANIFIDR Register Access. More...
 
#define CANIF_enable(ch)   { AVR32_CANIF.channel[ch].canctrl |= (1<<AVR32_CANIF_CANCTRL_CEN_OFFSET); }
 
#define CANIF_enable_interrupt(ch)
 
#define CANIF_enable_wakeup(ch)   { AVR32_CANIF.channel[ch].canctrl |= (1<<AVR32_CANIF_CANCTRL_WKEN_OFFSET); }
 
#define CANIF_enable_wakeup_interrupt(ch)   { AVR32_CANIF.channel[ch].canier = AVR32_CANIF_CANIER_WKUPIM_MASK; }
 CANIFIER Register Access. More...
 
#define CANIF_full_abort(ch)   { CANIF_disable(ch) }
 
#define CANIF_get_channel_mode(ch)   ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_CMODE_MASK)>> AVR32_CANIF_CANCFG_CMODE_OFFSET) )
 
#define CANIF_get_error_mode(ch)   ( ((AVR32_CANIF.channel[ch].canfc & AVR32_CANIF_CANFC_EMODE_MASK) >> AVR32_CANIF_CANFC_EMODE_OFFSET) )
 CANIFFC Register Access. More...
 
#define CANIF_get_ext_id(ch, mob)   ((CANIF_mob_get_ptr_data(ch,mob))->id & 0x1FFFFFFF )
 
#define CANIF_get_ide(ch, mob)   ((CANIF_mob_get_ptr_data(ch,mob))->ide_bit)
 
#define CANIF_get_idemask(ch, mob)   ((CANIF_mob_get_ptr_data(ch,mob))->ide_mask_bit)
 
#define CANIF_get_interrupt_aerr_status(ch)   ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_AERR_MASK)>> AVR32_CANIF_CANISR_AERR_OFFSET ))
 
#define CANIF_get_interrupt_berr_status(ch)   ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_BERR_MASK)>> AVR32_CANIF_CANISR_BERR_OFFSET ))
 
#define CANIF_get_interrupt_boff_status(ch)   ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_BOFF_MASK)>> AVR32_CANIF_CANISR_BOFF_OFFSET ))
 
#define CANIF_get_interrupt_cerr_status(ch)   ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_CERR_MASK)>> AVR32_CANIF_CANISR_CERR_OFFSET ))
 
#define CANIF_get_interrupt_error_status(ch)   ( AVR32_CANIF.channel[ch].canisr & 0x3F)
 
#define CANIF_get_interrupt_ferr_status(ch)   ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_FERR_MASK)>> AVR32_CANIF_CANISR_FERR_OFFSET ))
 
#define CANIF_get_interrupt_lastmob_selected(ch)   ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_LSMOB_MASK)>> AVR32_CANIF_CANISR_LSMOB_OFFSET ))
 
#define CANIF_get_interrupt_serr_status(ch)   ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_SERR_MASK)>> AVR32_CANIF_CANISR_SERR_OFFSET ))
 
#define CANIF_get_interrupt_status(ch)   ( AVR32_CANIF.channel[ch].canisr)
 CANIFISCR Register Access. More...
 
#define CANIF_get_interrupt_wakeup_status(ch)   ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_WKUP_MASK)>> AVR32_CANIF_CANISR_WKUP_OFFSET ))
 
#define CANIF_get_mobctrl(ch, mob)   (((unsigned volatile long*)&(AVR32_CANIF.channel[ch].mobctrl))[mob*3])
 MOBCTRL Register Access. More...
 
#define CANIF_get_overrun_mode(ch)   ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_OVRM_MASK)>> AVR32_CANIF_CANCFG_OVRM_OFFSET) )
 
#define CANIF_get_phs1(ch)   ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_PHS1_MASK)>> AVR32_CANIF_CANCFG_PHS1_OFFSET) )
 
#define CANIF_get_phs2(ch)   ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_PHS2_MASK)>> AVR32_CANIF_CANCFG_PHS2_OFFSET) )
 
#define CANIF_get_pres(ch)   ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_PRES_MASK)>> AVR32_CANIF_CANCFG_PRES_OFFSET) )
 
#define CANIF_get_prs(ch)   ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_PRS_MASK)>> AVR32_CANIF_CANCFG_PRS_OFFSET) )
 
#define CANIF_get_ram_add(ch)   ( AVR32_CANIF.channel[ch].canramb )
 CANRAMB Register Access. More...
 
#define CANIF_get_rec(ch)   ( ((AVR32_CANIF.channel[ch].canfc & AVR32_CANIF_CANFC_REC_MASK) >> AVR32_CANIF_CANFC_REC_OFFSET) )
 
#define CANIF_get_rtr(ch, mob)   ((CANIF_mob_get_ptr_data(ch,mob))->rtr_bit )
 
#define CANIF_get_rtrmask(ch, mob)   ((CANIF_mob_get_ptr_data(ch,mob))->rtr_mask_bit)
 
#define CANIF_get_sjw(ch)   ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_SJW_MASK)>> AVR32_CANIF_CANCFG_SJW_OFFSET) )
 
#define CANIF_get_sm(ch)   ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_SM_MASK)>> AVR32_CANIF_CANCFG_SM_OFFSET) )
 
#define CANIF_get_std_id(ch, mob)   ((CANIF_mob_get_ptr_data(ch,mob))->id & 0x000007FF )
 
#define CANIF_get_tec(ch)   ( ((AVR32_CANIF.channel[ch].canfc & AVR32_CANIF_CANFC_TEC_MASK) >> AVR32_CANIF_CANFC_TEC_OFFSET) )
 
#define CANIF_mob_allocate(ch)   (CANIF_mob_get_mob_free(ch))
 
#define CANIF_mob_clear_rxok_status(ch, mob)   {AVR32_CANIF.channel[ch].mrxiscr = 1<<mob;}
 MRXISCR Register Access. More...
 
#define CANIF_mob_clear_status(ch, mob)   {CANIF_mob_set_status(ch,mob,0x0F)}
 
#define CANIF_mob_clear_txok_status(ch, mob)   {AVR32_CANIF.channel[ch].mtxiscr = 1<<mob;}
 MTXISCR Register Access. More...
 
#define CANIF_mob_clr_automode(ch, mob)   { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)&~(1<<AVR32_CANIF_AM_OFFSET));}
 
#define CANIF_mob_clr_dir(ch, mob)   { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)&~(1<<AVR32_CANIF_DIR_OFFSET));}
 
#define CANIF_mob_clr_dlc(ch, mob)   { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)&~(0x0F<<AVR32_CANIF_DLC_OFFSET));}
 
#define CANIF_mob_disable(ch, mob)   {AVR32_CANIF.channel[ch].mobdr = 1<<mob;}
 MOBDR Register Access. More...
 
#define CANIF_mob_disable_interrupt(ch, mob)   {AVR32_CANIF.channel[ch].mobidr = 1<<mob;}
 MOBIDR Register Access. More...
 
#define CANIF_mob_enable(ch, mob)   {AVR32_CANIF.channel[ch].mober = 1<<mob;}
 MOBER Register Access. More...
 
#define CANIF_mob_enable_interrupt(ch, mob)   {AVR32_CANIF.channel[ch].mobier = 1<<mob;}
 MOBIER Register Access. More...
 
#define CANIF_mob_enable_status(ch, mob)   ((AVR32_CANIF.channel[ch].mobesr >> mob)&1)
 MOBESR Register Access. More...
 
#define CANIF_mob_free(ch, mob)   {CANIF_mob_disable(ch,mob)}
 
#define CANIF_mob_free_get_addr_data(ch)   (CANIF_SIZE_OF_CANIF_MSG*CANIF_mob_get_mob_free(ch)+CANIF_get_ram_add(ch))
 
#define CANIF_mob_free_get_ptr_data(ch)   ((can_msg_t *)(CANIF_SIZE_OF_CANIF_MSG*CANIF_mob_get_mob_free(ch)+CANIF_get_ram_add(ch)))
 
#define CANIF_mob_get_addr_data(ch, mob)   ((CANIF_SIZE_OF_CANIF_MSG*mob+CANIF_get_ram_add(ch)))
 
#define CANIF_mob_get_dir(ch, mob)   ( (CANIF_get_mobctrl(ch,mob)&AVR32_CANIF_DIR_MASK) >> AVR32_CANIF_DIR_OFFSET )
 
#define CANIF_mob_get_dlc(ch, mob)   ( (CANIF_get_mobctrl(ch,mob)&AVR32_CANIF_DLC_MASK)>>AVR32_CANIF_DLC_OFFSET )
 
#define CANIF_mob_get_mob_free(ch)   ((AVR32_CANIF.channel[ch].mobsch&AVR32_CANIF_MOBSCH_MAV_MASK)>>AVR32_CANIF_MOBSCH_MAV_OFFSET)
 MOBSCH Register Access. More...
 
#define CANIF_mob_get_mob_rxok(ch)   ((AVR32_CANIF.channel[ch].mobsch&AVR32_CANIF_MOBSCH_MRXOK_MASK)>>AVR32_CANIF_MOBSCH_MRXOK_OFFSET)
 
#define CANIF_mob_get_mob_txok(ch)   ((AVR32_CANIF.channel[ch].mobsch&AVR32_CANIF_MOBSCH_MTXOK_MASK)>>AVR32_CANIF_MOBSCH_MTXOK_OFFSET)
 
#define CANIF_mob_get_ptr_data(ch, mob)   ((can_msg_t *)(CANIF_SIZE_OF_CANIF_MSG*mob+CANIF_get_ram_add(ch)))
 
#define CANIF_mob_get_rxok_status(ch, mob)   ((AVR32_CANIF.channel[ch].mrxisr >> mob)& 1)
 MRXISR Register Access. More...
 
#define CANIF_mob_get_status(ch, mob)   (((unsigned volatile long*) &(AVR32_CANIF.channel[ch].mobsr))[mob*3])
 MOBSR Register Access. More...
 
#define CANIF_mob_get_txok_status(ch, mob)   ((AVR32_CANIF.channel[ch].mtxisr >> mob)& 1)
 MTXISR Register Access. More...
 
#define CANIF_mob_set_automode(ch, mob)   { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)| (1<<AVR32_CANIF_AM_OFFSET));}
 
#define CANIF_mob_set_dir(ch, mob)   { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)| (1<<AVR32_CANIF_DIR_OFFSET));}
 
#define CANIF_mob_set_dlc(ch, mob, dlc)   { CANIF_set_mobctrl(ch,mob,(CANIF_get_mobctrl(ch,mob)| (dlc<<AVR32_CANIF_DLC_OFFSET))); }
 
#define CANIF_mob_set_status(ch, mob, val)   {((unsigned volatile long*) &(AVR32_CANIF.channel[ch].mobscr))[mob*3]=val;}
 
#define CANIF_mobctrl(ch, mob)   (((unsigned volatile long*)&(AVR32_CANIF.channel[ch].mobctrl))[mob*3])
 
#define CANIF_send_overload(ch)   { AVR32_CANIF.channel[ch].canctrl |= (1<<AVR32_CANIF_CANCTRL_OVRQ_OFFSET); }
 
#define CANIF_set_channel_mode(ch, mode)
 
#define CANIF_set_data(ch, mob, _data)   {(CANIF_mob_get_ptr_data(ch,mob))->data.u64 = _data;}
 
#define CANIF_set_ext_id(ch, mob, _id)   {(CANIF_mob_get_ptr_data(ch,mob))->id = (1<<IDE_BIT)|(_id);}
 
#define CANIF_set_ext_idmask(ch, mob, mask)   {(CANIF_mob_get_ptr_data(ch,mob))->id_mask = mask;}
 
#define CANIF_set_ide(ch, mob)   {(CANIF_mob_get_ptr_data(ch,mob))->ide_bit = 1;}
 
#define CANIF_set_idemask(ch, mob)   {(CANIF_mob_get_ptr_data(ch,mob))->ide_mask_bit = 1;}
 
#define CANIF_set_mobctrl(ch, mob, val)   (((unsigned volatile long*)&(AVR32_CANIF.channel[ch].mobctrl))[mob*3]=val)
 
#define CANIF_set_overrun_mode(ch)   { AVR32_CANIF.channel[ch].cancfg |= (1<<AVR32_CANIF_CANCFG_OVRM_OFFSET); }
 
#define CANIF_set_phs1(ch, phs1)
 
#define CANIF_set_phs2(ch, phs2)
 
#define CANIF_set_pres(ch, pres)
 
#define CANIF_set_prs(ch, prs)
 
#define CANIF_set_ram_add(ch, add)   { AVR32_CANIF.channel[ch].canramb = add; }
 
#define CANIF_set_reset(ch)   { AVR32_CANIF.channel[ch].canctrl = (1<<AVR32_CANIF_CANCTRL_INIT_OFFSET); }
 CANCTRL Register Access. More...
 
#define CANIF_set_rtr(ch, mob)   {(CANIF_mob_get_ptr_data(ch,mob))->rtr_bit = 1;}
 
#define CANIF_set_rtrmask(ch, mob)   {(CANIF_mob_get_ptr_data(ch,mob))->rtr_mask_bit = 1;}
 
#define CANIF_set_sjw(ch, sjw)
 
#define CANIF_set_sm(ch, sm)   { AVR32_CANIF.channel[ch].cancfg |= (sm<<AVR32_CANIF_CANCFG_SM_OFFSET); }
 
#define CANIF_set_std_id(ch, mob, _id)   {(CANIF_mob_get_ptr_data(ch,mob))->id = (_id);}
 
#define CANIF_set_std_idmask(ch, mob, mask)   {(CANIF_mob_get_ptr_data(ch,mob))->id_mask = mask;}
 
#define CANIF_SIZE_OF_CANIF_MSG   (sizeof(can_msg_t))
 
#define DATA   0
 
#define EXTD   1
 
#define IDE_BIT   29
 
#define MOB_ACK_ERROR   (AVR32_CANIF_AERR_MASK)
 
#define MOB_BIT_ERROR   (AVR32_CANIF_BERR_MASK)
 
#define MOB_CRC_ERROR   (AVR32_CANIF_CERR_MASK)
 
#define MOB_DISABLE   0xFF
 
#define MOB_FORM_ERROR   (AVR32_CANIF_FERR_MASK)
 
#define MOB_NOT_COMPLETED   0x00
 
#define MOB_NOT_REACHED
 
#define MOB_RX_COMPLETED   (AVR32_CANIF_MOBSR_RXOK_MASK)
 
#define MOB_RX_COMPLETED_DLCW   ((AVR32_CANIF_MOBSR_RXOK_MASK)|(AVR32_CANIF_MOBSR_DLCW_MASK))
 
#define MOB_STUFF_ERROR   (AVR32_CANIF_SERR_MASK)
 
#define MOB_TX_COMPLETED   (AVR32_CANIF_MOBSR_TXOK_MASK)
 
#define NO_MOB   0xff
 
#define NTQ_MAX   25
 
#define NTQ_MIN   8
 
#define PHS1_MAX   8
 
#define PHS1_MIN   2
 
#define PHS2_MAX   8
 
#define PHS2_MIN   2
 
#define PRS_MAX   8
 
#define PRS_MIN   1
 
#define REMOTE   1
 
#define RTR_BIT   30
 
#define SJW_MAX   4
 
#define SJW_MIN   1
 
#define STATUS_CLEARED   0x00
 
#define STD   0
 

Functions

void canif_clear_all_mob (uint8_t ch, uint8_t nb_mob)
 Clear all mob of a channel. More...
 
uint8_t canif_fixed_baudrate (uint8_t ch)
 Config Baudrate with fixed baudrate. More...
 
uint8_t canif_get_mob_free (uint8_t ch)
 Get the first MOB free. More...
 
uint8_t canif_get_mob_status (uint8_t ch, uint8_t mob)
 Gets the mob status. More...
 

#define AVR32_PM_AWEN_CANIF0WEN_MASK   0x02
#define AVR32_PM_AWEN_CANIF1WEN_MASK   0x04
#define BRP_MAX   64
#define BRP_MIN   1
#define CANIF_channel_enable_status (   ch)    ( (AVR32_CANIF.channel[ch].cansr&AVR32_CANIF_CANSR_CES_MASK) >> AVR32_CANIF_CANSR_CES_OFFSET )

CANIFSR Register Access.

Referenced by can_init(), and main().

#define CANIF_CHANNEL_MODE_LISTENING   1

Referenced by can_init(), and main().

#define CANIF_CHANNEL_MODE_LOOPBACK   2

Referenced by can_init().

#define CANIF_CHANNEL_MODE_NORMAL   0

CANIFCFG Register Access.

Referenced by can_example_prepare_data(), can_example_prepare_data_to_receive(), can_example_prepare_data_to_send(), can_init(), and main().

#define CANIF_channel_overload_status (   ch)    ( (AVR32_CANIF.channel[ch].cansr&AVR32_CANIF_CANSR_OVS_MASK) >> AVR32_CANIF_CANSR_OVS_OFFSET )
#define CANIF_channel_receive_status (   ch)    ( (AVR32_CANIF.channel[ch].cansr&AVR32_CANIF_CANSR_RS_MASK) >> AVR32_CANIF_CANSR_RS_OFFSET )
#define CANIF_channel_transmit_status (   ch)    ( (AVR32_CANIF.channel[ch].cansr&AVR32_CANIF_CANSR_TS_MASK) >> AVR32_CANIF_CANSR_TS_OFFSET )
#define CANIF_clr_ide (   ch,
  mob 
)    {(CANIF_mob_get_ptr_data(ch,mob))->ide_bit = 0;}
#define CANIF_clr_idemask (   ch,
  mob 
)    {(CANIF_mob_get_ptr_data(ch,mob))->ide_mask_bit = 0);}
#define CANIF_clr_interrupt_status (   ch)    { AVR32_CANIF.channel[ch].caniscr = CANIF_get_interrupt_status(ch); }

Referenced by can0_int_busoff_handler(), can0_int_cerr_handler(), can0_int_wakeup_handler(), can1_int_busoff_handler(), can1_int_cerr_handler(), and can1_int_wakeup_handler().

#define CANIF_clr_mob (   ch,
  mob 
)
Value:
{(CANIF_mob_get_ptr_data(ch,mob))->id = 0; \
(CANIF_mob_get_ptr_data(ch,mob))->id_mask = 0; \
(CANIF_mob_get_ptr_data(ch,mob))->data.u64 = 0;}
data
JOCTET FAR * data
Definition: jdmarker.c:745
CANIF_mob_get_ptr_data
#define CANIF_mob_get_ptr_data(ch, mob)
Definition: canif.h:289

Referenced by can_mob_alloc(), and canif_clear_all_mob().

#define CANIF_clr_overrun_mode (   ch)    { AVR32_CANIF.channel[ch].cancfg &= ~(1<<AVR32_CANIF_CANCFG_OVRM_OFFSET); }

Referenced by can_init().

#define CANIF_clr_reset (   ch)    { AVR32_CANIF.channel[ch].canctrl = (0<<AVR32_CANIF_CANCTRL_INIT_OFFSET); }

Referenced by can_init().

#define CANIF_clr_rtr (   ch,
  mob 
)    {(CANIF_mob_get_ptr_data(ch,mob))->rtr_bit = 0;}
#define CANIF_clr_rtrmask (   ch,
  mob 
)    {(CANIF_mob_get_ptr_data(ch,mob))->rtr_mask_bit = 0;}
#define CANIF_conf_bt (   ch)
Value:
{ CANIF_set_sjw(ch,BAUDRATE##_SJW); \
CANIF_set_prs(ch,BAUDRATE##_PRS); \
CANIF_set_pres(ch,BAUDRATE##_PRES); \
CANIF_set_phs2(ch,BAUDRATE##_PHS2); \
CANIF_set_phs1(ch,BAUDRATE##_PHS1); }
CANIF_set_prs
#define CANIF_set_prs(ch, prs)
Definition: canif.h:184
CANIF_set_phs1
#define CANIF_set_phs1(ch, phs1)
Definition: canif.h:175
CANIF_set_pres
#define CANIF_set_pres(ch, pres)
Definition: canif.h:181
CANIF_set_phs2
#define CANIF_set_phs2(ch, phs2)
Definition: canif.h:178
CANIF_set_sjw
#define CANIF_set_sjw(ch, sjw)
Definition: canif.h:187
BAUDRATE
#define BAUDRATE
Definition: conf_can.h:49

Referenced by canif_fixed_baudrate().

#define CANIF_config_rx (   ch,
  mob 
)    {CANIF_mob_clr_dir(ch,mob) }

Referenced by can_rx().

#define CANIF_config_tx (   ch,
  mob 
)    {CANIF_mob_set_dir(ch,mob) }

Referenced by can_tx().

#define CANIF_disable (   ch)    { AVR32_CANIF.channel[ch].canctrl &= ~(1<<AVR32_CANIF_CANCTRL_CEN_OFFSET); }

Referenced by main().

#define CANIF_disable_interrupt (   ch)
Value:
{ AVR32_CANIF.channel[ch].canidr = AVR32_CANIF_CANIDR_TXOKIM_MASK | \
AVR32_CANIF_CANIDR_RXOKIM_MASK | \
AVR32_CANIF_CANIDR_CERRIM_MASK | \
AVR32_CANIF_CANIDR_BOFFIM_MASK; }
#define CANIF_disable_wakeup (   ch)    { AVR32_CANIF.channel[ch].canctrl &= ~(1<<AVR32_CANIF_CANCTRL_WKEN_OFFSET); }
#define CANIF_disable_wakeup_interrupt (   ch)    { AVR32_CANIF.channel[ch].canidr = AVR32_CANIF_CANIDR_WKUPIM_MASK; }

CANIFIDR Register Access.

#define CANIF_enable (   ch)    { AVR32_CANIF.channel[ch].canctrl |= (1<<AVR32_CANIF_CANCTRL_CEN_OFFSET); }

Referenced by can_init().

#define CANIF_enable_interrupt (   ch)
Value:
{ AVR32_CANIF.channel[ch].canier = AVR32_CANIF_CANIER_TXOKIM_MASK | \
AVR32_CANIF_CANIER_RXOKIM_MASK | \
AVR32_CANIF_CANIER_CERRIM_MASK | \
AVR32_CANIF_CANIER_BOFFIM_MASK | \
AVR32_CANIF_CANIER_WKUPIM_MASK; }

Referenced by can_enable_interrupt().

#define CANIF_enable_wakeup (   ch)    { AVR32_CANIF.channel[ch].canctrl |= (1<<AVR32_CANIF_CANCTRL_WKEN_OFFSET); }

Referenced by main().

#define CANIF_enable_wakeup_interrupt (   ch)    { AVR32_CANIF.channel[ch].canier = AVR32_CANIF_CANIER_WKUPIM_MASK; }

CANIFIER Register Access.

#define CANIF_full_abort (   ch)    { CANIF_disable(ch) }
#define CANIF_get_channel_mode (   ch)    ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_CMODE_MASK)>> AVR32_CANIF_CANCFG_CMODE_OFFSET) )
#define CANIF_get_error_mode (   ch)    ( ((AVR32_CANIF.channel[ch].canfc & AVR32_CANIF_CANFC_EMODE_MASK) >> AVR32_CANIF_CANFC_EMODE_OFFSET) )

CANIFFC Register Access.

#define CANIF_get_ext_id (   ch,
  mob 
)    ((CANIF_mob_get_ptr_data(ch,mob))->id & 0x1FFFFFFF )

Referenced by can_get_mob_id().

#define CANIF_get_ide (   ch,
  mob 
)    ((CANIF_mob_get_ptr_data(ch,mob))->ide_bit)
#define CANIF_get_idemask (   ch,
  mob 
)    ((CANIF_mob_get_ptr_data(ch,mob))->ide_mask_bit)
#define CANIF_get_interrupt_aerr_status (   ch)    ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_AERR_MASK)>> AVR32_CANIF_CANISR_AERR_OFFSET ))
#define CANIF_get_interrupt_berr_status (   ch)    ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_BERR_MASK)>> AVR32_CANIF_CANISR_BERR_OFFSET ))
#define CANIF_get_interrupt_boff_status (   ch)    ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_BOFF_MASK)>> AVR32_CANIF_CANISR_BOFF_OFFSET ))
#define CANIF_get_interrupt_cerr_status (   ch)    ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_CERR_MASK)>> AVR32_CANIF_CANISR_CERR_OFFSET ))
#define CANIF_get_interrupt_error_status (   ch)    ( AVR32_CANIF.channel[ch].canisr & 0x3F)

Referenced by can_mob_get_status(), and canif_get_mob_status().

#define CANIF_get_interrupt_ferr_status (   ch)    ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_FERR_MASK)>> AVR32_CANIF_CANISR_FERR_OFFSET ))
#define CANIF_get_interrupt_lastmob_selected (   ch)    ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_LSMOB_MASK)>> AVR32_CANIF_CANISR_LSMOB_OFFSET ))

Referenced by canif_get_mob_status().

#define CANIF_get_interrupt_serr_status (   ch)    ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_SERR_MASK)>> AVR32_CANIF_CANISR_SERR_OFFSET ))
#define CANIF_get_interrupt_status (   ch)    ( AVR32_CANIF.channel[ch].canisr)

CANIFISCR Register Access.

#define CANIF_get_interrupt_wakeup_status (   ch)    ( ((AVR32_CANIF.channel[ch].canisr & AVR32_CANIF_CANISR_WKUP_MASK)>> AVR32_CANIF_CANISR_WKUP_OFFSET ))
#define CANIF_get_mobctrl (   ch,
  mob 
)    (((unsigned volatile long*)&(AVR32_CANIF.channel[ch].mobctrl))[mob*3])

MOBCTRL Register Access.

#define CANIF_get_overrun_mode (   ch)    ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_OVRM_MASK)>> AVR32_CANIF_CANCFG_OVRM_OFFSET) )
#define CANIF_get_phs1 (   ch)    ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_PHS1_MASK)>> AVR32_CANIF_CANCFG_PHS1_OFFSET) )
#define CANIF_get_phs2 (   ch)    ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_PHS2_MASK)>> AVR32_CANIF_CANCFG_PHS2_OFFSET) )
#define CANIF_get_pres (   ch)    ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_PRES_MASK)>> AVR32_CANIF_CANCFG_PRES_OFFSET) )
#define CANIF_get_prs (   ch)    ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_PRS_MASK)>> AVR32_CANIF_CANCFG_PRS_OFFSET) )
#define CANIF_get_ram_add (   ch)    ( AVR32_CANIF.channel[ch].canramb )

CANRAMB Register Access.

#define CANIF_get_rec (   ch)    ( ((AVR32_CANIF.channel[ch].canfc & AVR32_CANIF_CANFC_REC_MASK) >> AVR32_CANIF_CANFC_REC_OFFSET) )
#define CANIF_get_rtr (   ch,
  mob 
)    ((CANIF_mob_get_ptr_data(ch,mob))->rtr_bit )
#define CANIF_get_rtrmask (   ch,
  mob 
)    ((CANIF_mob_get_ptr_data(ch,mob))->rtr_mask_bit)
#define CANIF_get_sjw (   ch)    ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_SJW_MASK)>> AVR32_CANIF_CANCFG_SJW_OFFSET) )
#define CANIF_get_sm (   ch)    ( ((AVR32_CANIF.channel[ch].cancfg & AVR32_CANIF_CANCFG_SM_MASK)>> AVR32_CANIF_CANCFG_SM_OFFSET) )
#define CANIF_get_std_id (   ch,
  mob 
)    ((CANIF_mob_get_ptr_data(ch,mob))->id & 0x000007FF )
#define CANIF_get_tec (   ch)    ( ((AVR32_CANIF.channel[ch].canfc & AVR32_CANIF_CANFC_TEC_MASK) >> AVR32_CANIF_CANFC_TEC_OFFSET) )
#define CANIF_mob_allocate (   ch)    (CANIF_mob_get_mob_free(ch))
#define CANIF_mob_clear_rxok_status (   ch,
  mob 
)    {AVR32_CANIF.channel[ch].mrxiscr = 1<<mob;}

MRXISCR Register Access.

Referenced by can0_int_rx_handler(), and can1_int_rx_handler().

#define CANIF_mob_clear_status (   ch,
  mob 
)    {CANIF_mob_set_status(ch,mob,0x0F)}

Referenced by can0_int_rx_handler(), can0_int_tx_handler(), can1_int_rx_handler(), can1_int_tx_handler(), and can_clear_status().

#define CANIF_mob_clear_txok_status (   ch,
  mob 
)    {AVR32_CANIF.channel[ch].mtxiscr = 1<<mob;}

MTXISCR Register Access.

Referenced by can0_int_tx_handler(), and can1_int_tx_handler().

#define CANIF_mob_clr_automode (   ch,
  mob 
)    { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)&~(1<<AVR32_CANIF_AM_OFFSET));}
#define CANIF_mob_clr_dir (   ch,
  mob 
)    { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)&~(1<<AVR32_CANIF_DIR_OFFSET));}
#define CANIF_mob_clr_dlc (   ch,
  mob 
)    { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)&~(0x0F<<AVR32_CANIF_DLC_OFFSET));}

Referenced by can_tx().

#define CANIF_mob_disable (   ch,
  mob 
)    {AVR32_CANIF.channel[ch].mobdr = 1<<mob;}

MOBDR Register Access.

#define CANIF_mob_disable_interrupt (   ch,
  mob 
)    {AVR32_CANIF.channel[ch].mobidr = 1<<mob;}

MOBIDR Register Access.

#define CANIF_mob_enable (   ch,
  mob 
)    {AVR32_CANIF.channel[ch].mober = 1<<mob;}

MOBER Register Access.

Referenced by can_rx(), and can_tx().

#define CANIF_mob_enable_interrupt (   ch,
  mob 
)    {AVR32_CANIF.channel[ch].mobier = 1<<mob;}

MOBIER Register Access.

Referenced by can_rx(), and can_tx().

#define CANIF_mob_enable_status (   ch,
  mob 
)    ((AVR32_CANIF.channel[ch].mobesr >> mob)&1)

MOBESR Register Access.

Referenced by canif_get_mob_status().

#define CANIF_mob_free (   ch,
  mob 
)    {CANIF_mob_disable(ch,mob)}
#define CANIF_mob_free_get_addr_data (   ch)    (CANIF_SIZE_OF_CANIF_MSG*CANIF_mob_get_mob_free(ch)+CANIF_get_ram_add(ch))
#define CANIF_mob_free_get_ptr_data (   ch)    ((can_msg_t *)(CANIF_SIZE_OF_CANIF_MSG*CANIF_mob_get_mob_free(ch)+CANIF_get_ram_add(ch)))
#define CANIF_mob_get_addr_data (   ch,
  mob 
)    ((CANIF_SIZE_OF_CANIF_MSG*mob+CANIF_get_ram_add(ch)))
#define CANIF_mob_get_dir (   ch,
  mob 
)    ( (CANIF_get_mobctrl(ch,mob)&AVR32_CANIF_DIR_MASK) >> AVR32_CANIF_DIR_OFFSET )
#define CANIF_mob_get_dlc (   ch,
  mob 
)    ( (CANIF_get_mobctrl(ch,mob)&AVR32_CANIF_DLC_MASK)>>AVR32_CANIF_DLC_OFFSET )

Referenced by can_get_mob_dlc().

#define CANIF_mob_get_mob_free (   ch)    ((AVR32_CANIF.channel[ch].mobsch&AVR32_CANIF_MOBSCH_MAV_MASK)>>AVR32_CANIF_MOBSCH_MAV_OFFSET)

MOBSCH Register Access.

Referenced by canif_get_mob_free().

#define CANIF_mob_get_mob_rxok (   ch)    ((AVR32_CANIF.channel[ch].mobsch&AVR32_CANIF_MOBSCH_MRXOK_MASK)>>AVR32_CANIF_MOBSCH_MRXOK_OFFSET)

Referenced by can0_int_rx_handler(), and can1_int_rx_handler().

#define CANIF_mob_get_mob_txok (   ch)    ((AVR32_CANIF.channel[ch].mobsch&AVR32_CANIF_MOBSCH_MTXOK_MASK)>>AVR32_CANIF_MOBSCH_MTXOK_OFFSET)

Referenced by can0_int_tx_handler(), and can1_int_tx_handler().

#define CANIF_mob_get_ptr_data (   ch,
  mob 
)    ((can_msg_t *)(CANIF_SIZE_OF_CANIF_MSG*mob+CANIF_get_ram_add(ch)))

Referenced by can_get_mob_data().

#define CANIF_mob_get_rxok_status (   ch,
  mob 
)    ((AVR32_CANIF.channel[ch].mrxisr >> mob)& 1)

MRXISR Register Access.

#define CANIF_mob_get_status (   ch,
  mob 
)    (((unsigned volatile long*) &(AVR32_CANIF.channel[ch].mobsr))[mob*3])

MOBSR Register Access.

Referenced by can_mob_get_status(), and canif_get_mob_status().

#define CANIF_mob_get_txok_status (   ch,
  mob 
)    ((AVR32_CANIF.channel[ch].mtxisr >> mob)& 1)

MTXISR Register Access.

#define CANIF_mob_set_automode (   ch,
  mob 
)    { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)| (1<<AVR32_CANIF_AM_OFFSET));}

Referenced by can_rx(), and can_tx().

#define CANIF_mob_set_dir (   ch,
  mob 
)    { CANIF_set_mobctrl(ch,mob,CANIF_get_mobctrl(ch,mob)| (1<<AVR32_CANIF_DIR_OFFSET));}
#define CANIF_mob_set_dlc (   ch,
  mob,
  dlc 
)    { CANIF_set_mobctrl(ch,mob,(CANIF_get_mobctrl(ch,mob)| (dlc<<AVR32_CANIF_DLC_OFFSET))); }

Referenced by can_tx().

#define CANIF_mob_set_status (   ch,
  mob,
  val 
)    {((unsigned volatile long*) &(AVR32_CANIF.channel[ch].mobscr))[mob*3]=val;}
#define CANIF_mobctrl (   ch,
  mob 
)    (((unsigned volatile long*)&(AVR32_CANIF.channel[ch].mobctrl))[mob*3])
#define CANIF_send_overload (   ch)    { AVR32_CANIF.channel[ch].canctrl |= (1<<AVR32_CANIF_CANCTRL_OVRQ_OFFSET); }
#define CANIF_set_channel_mode (   ch,
  mode 
)
Value:
{ AVR32_CANIF.channel[ch].cancfg &= ~(AVR32_CANIF_CANCFG_CMODE_MASK); \
AVR32_CANIF.channel[ch].cancfg |= (mode<<AVR32_CANIF_CANCFG_CMODE_OFFSET); }

Referenced by can_init().

#define CANIF_set_data (   ch,
  mob,
  _data 
)    {(CANIF_mob_get_ptr_data(ch,mob))->data.u64 = _data;}

Referenced by can_rx(), and can_tx().

#define CANIF_set_ext_id (   ch,
  mob,
  _id 
)    {(CANIF_mob_get_ptr_data(ch,mob))->id = (1<<IDE_BIT)|(_id);}

Referenced by can_rx(), and can_tx().

#define CANIF_set_ext_idmask (   ch,
  mob,
  mask 
)    {(CANIF_mob_get_ptr_data(ch,mob))->id_mask = mask;}

Referenced by can_rx(), and can_tx().

#define CANIF_set_ide (   ch,
  mob 
)    {(CANIF_mob_get_ptr_data(ch,mob))->ide_bit = 1;}
#define CANIF_set_idemask (   ch,
  mob 
)    {(CANIF_mob_get_ptr_data(ch,mob))->ide_mask_bit = 1;}
#define CANIF_set_mobctrl (   ch,
  mob,
  val 
)    (((unsigned volatile long*)&(AVR32_CANIF.channel[ch].mobctrl))[mob*3]=val)
#define CANIF_set_overrun_mode (   ch)    { AVR32_CANIF.channel[ch].cancfg |= (1<<AVR32_CANIF_CANCFG_OVRM_OFFSET); }

Referenced by can_init().

#define CANIF_set_phs1 (   ch,
  phs1 
)
Value:
{ AVR32_CANIF.channel[ch].cancfg &= ~(AVR32_CANIF_CANCFG_PHS1_MASK); \
AVR32_CANIF.channel[ch].cancfg |= (phs1<<AVR32_CANIF_CANCFG_PHS1_OFFSET); }
#define CANIF_set_phs2 (   ch,
  phs2 
)
Value:
{ AVR32_CANIF.channel[ch].cancfg &= ~(AVR32_CANIF_CANCFG_PHS2_MASK); \
AVR32_CANIF.channel[ch].cancfg |= (phs2<<AVR32_CANIF_CANCFG_PHS2_OFFSET); }
#define CANIF_set_pres (   ch,
  pres 
)
Value:
{ AVR32_CANIF.channel[ch].cancfg &= ~(AVR32_CANIF_CANCFG_PRES_MASK); \
AVR32_CANIF.channel[ch].cancfg |= (pres<<AVR32_CANIF_CANCFG_PRES_OFFSET); }
#define CANIF_set_prs (   ch,
  prs 
)
Value:
{ AVR32_CANIF.channel[ch].cancfg &= ~(AVR32_CANIF_CANCFG_PRS_MASK); \
AVR32_CANIF.channel[ch].cancfg |= (prs<<AVR32_CANIF_CANCFG_PRS_OFFSET); }
#define CANIF_set_ram_add (   ch,
  add 
)    { AVR32_CANIF.channel[ch].canramb = add; }

Referenced by can_init().

#define CANIF_set_reset (   ch)    { AVR32_CANIF.channel[ch].canctrl = (1<<AVR32_CANIF_CANCTRL_INIT_OFFSET); }

CANCTRL Register Access.

Referenced by can_init().

#define CANIF_set_rtr (   ch,
  mob 
)    {(CANIF_mob_get_ptr_data(ch,mob))->rtr_bit = 1;}

Referenced by can_rx(), and can_tx().

#define CANIF_set_rtrmask (   ch,
  mob 
)    {(CANIF_mob_get_ptr_data(ch,mob))->rtr_mask_bit = 1;}

Referenced by can_rx(), and can_tx().

#define CANIF_set_sjw (   ch,
  sjw 
)
Value:
{ AVR32_CANIF.channel[ch].cancfg &= ~(AVR32_CANIF_CANCFG_SJW_MASK); \
AVR32_CANIF.channel[ch].cancfg |= (sjw<<AVR32_CANIF_CANCFG_SJW_OFFSET); }
#define CANIF_set_sm (   ch,
  sm 
)    { AVR32_CANIF.channel[ch].cancfg |= (sm<<AVR32_CANIF_CANCFG_SM_OFFSET); }
#define CANIF_set_std_id (   ch,
  mob,
  _id 
)    {(CANIF_mob_get_ptr_data(ch,mob))->id = (_id);}

Referenced by can_rx(), and can_tx().

#define CANIF_set_std_idmask (   ch,
  mob,
  mask 
)    {(CANIF_mob_get_ptr_data(ch,mob))->id_mask = mask;}

Referenced by can_rx(), and can_tx().

#define CANIF_SIZE_OF_CANIF_MSG   (sizeof(can_msg_t))
#define DATA   0
#define EXTD   1
#define IDE_BIT   29
#define MOB_ACK_ERROR   (AVR32_CANIF_AERR_MASK)
#define MOB_BIT_ERROR   (AVR32_CANIF_BERR_MASK)
#define MOB_CRC_ERROR   (AVR32_CANIF_CERR_MASK)
#define MOB_DISABLE   0xFF

Referenced by canif_get_mob_status().

#define MOB_FORM_ERROR   (AVR32_CANIF_FERR_MASK)
#define MOB_NOT_COMPLETED   0x00

Referenced by canif_get_mob_status().

#define MOB_NOT_REACHED
Value:
((AVR32_CANIF_AERR_MASK)| \
(AVR32_CANIF_FERR_MASK)| \
(AVR32_CANIF_CERR_MASK)| \
(AVR32_CANIF_SERR_MASK)| \
(AVR32_CANIF_BERR_MASK))
#define MOB_RX_COMPLETED   (AVR32_CANIF_MOBSR_RXOK_MASK)

Referenced by can_mob_get_status(), and canif_get_mob_status().

#define MOB_RX_COMPLETED_DLCW   ((AVR32_CANIF_MOBSR_RXOK_MASK)|(AVR32_CANIF_MOBSR_DLCW_MASK))

Referenced by can_mob_get_status(), and canif_get_mob_status().

#define MOB_STUFF_ERROR   (AVR32_CANIF_SERR_MASK)
#define MOB_TX_COMPLETED   (AVR32_CANIF_MOBSR_TXOK_MASK)

Referenced by can_mob_get_status(), and canif_get_mob_status().

#define NO_MOB   0xff

Referenced by canif_get_mob_free().

#define NTQ_MAX   25
#define NTQ_MIN   8
#define PHS1_MAX   8
#define PHS1_MIN   2
#define PHS2_MAX   8
#define PHS2_MIN   2
#define PRS_MAX   8
#define PRS_MIN   1
#define REMOTE   1
#define RTR_BIT   30
#define SJW_MAX   4
#define SJW_MIN   1
#define STATUS_CLEARED   0x00
#define STD   0

void canif_clear_all_mob ( uint8_t  ch,
uint8_t  nb_mob 
)

Clear all mob of a channel.

Parameters
chCAN channel selected 0 (CAN Channel 0) 1 (CAN Channel 1)
nb_mobNumber of MOBs to clear

References CANIF_clr_mob.

Referenced by can_init().

uint8_t canif_fixed_baudrate ( uint8_t  ch)

Config Baudrate with fixed baudrate.

Parameters
chCAN channel selected 0 (CAN Channel 0) 1 (CAN Channel 1)
Returns
1 Status completed

References CANIF_conf_bt.

uint8_t canif_get_mob_free ( uint8_t  ch)

Get the first MOB free.

Parameters
chCAN channel selected 0 (CAN Channel 0) 1 (CAN Channel 1)
Returns
uint8_t First available MOB or NO_MOB

References CANIF_mob_get_mob_free, and NO_MOB.

uint8_t canif_get_mob_status ( uint8_t  ch,
uint8_t  mob 
)

Gets the mob status.

Parameters
chCAN channel selected 0 (CAN Channel 0) 1 (CAN Channel 1)
mobMob number
Returns
uint8_t MOB_RX_COMPLETED or MOB_TX_COMPLETED or MOB_RX_COMPLETED_DLCW MOB_NOT_COMPLETED or CANIF.ISR register value.

References CANIF_get_interrupt_error_status, CANIF_get_interrupt_lastmob_selected, CANIF_mob_enable_status, CANIF_mob_get_status, MOB_DISABLE, MOB_NOT_COMPLETED, MOB_RX_COMPLETED, MOB_RX_COMPLETED_DLCW, and MOB_TX_COMPLETED.

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