PLL0/PLL1 startup options.
#include <scif_uc3c.h>
Data Fields | |
| unsigned int | div |
| PLL DIV in the PLL formula. More... | |
| unsigned int | lockcount |
| PLL lockcount. More... | |
| unsigned int | mul |
| PLL MUL in the PLL formula. More... | |
| unsigned char | osc |
| Specify the oscillator input. More... | |
| unsigned char | pll_div2 |
| Divide the PLL output frequency by 2. (this settings does not change the FVCO value) More... | |
| unsigned char | pll_freq |
| Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. More... | |
| unsigned char | pll_wbwdisable |
| 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. More... | |
| unsigned int scif_pll_opt_t::div |
PLL DIV in the PLL formula.
Referenced by clockfrequencies_configure(), and scif_pll_setup().
| unsigned int scif_pll_opt_t::lockcount |
PLL lockcount.
Referenced by clockfrequencies_configure(), and scif_pll_setup().
| unsigned int scif_pll_opt_t::mul |
PLL MUL in the PLL formula.
Referenced by clockfrequencies_configure(), and scif_pll_setup().
| unsigned char scif_pll_opt_t::osc |
Specify the oscillator input.
Referenced by clockfrequencies_configure(), pcl_configure_usb_clock(), and scif_pll_setup().
| unsigned char scif_pll_opt_t::pll_div2 |
Divide the PLL output frequency by 2. (this settings does not change the FVCO value)
Referenced by clockfrequencies_configure(), and scif_pll_setup().
| unsigned char scif_pll_opt_t::pll_freq |
Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
Referenced by clockfrequencies_configure(), and scif_pll_setup().
| unsigned char scif_pll_opt_t::pll_wbwdisable |
1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
Referenced by clockfrequencies_configure(), and scif_pll_setup().
1.8.5