See Quick start guide for MEGARF TWI driver.
Driver for the Two-Wire Interface (TWI). Provides functions for configuring and using the TWI in both master and slave mode.
See Quick start guide for MEGARF TWI driver
Modules | |
Related Project(s) | |
In this section you can find all the projects related to the TWI - Two-Wire Interface. | |
Quick Start Guide(s) | |
In this section you can find a list of all Quick Start guides related to the TWI - Two-Wire Interface. | |
twi master Driver | |
This driver is the implementation of TWI module of megaRF device as master. | |
twi slave Driver | |
This driver is the implementation of TWI module of megaRF device as slave. | |
Data Structures | |
struct | slave_data_buffer_t |
TWI Slave data buffers. More... | |
struct | twi_master_options_t |
Input parameters when initializing the twi master mode. More... | |
struct | twi_package_t |
Information concerning the data transmission. More... | |
Macros | |
#define | TWI_CLOCK_RATE(F_CPU, TWI_SPEED) |
Baud rate register setting calculation. More... | |
#define | TWI_IDLE 1 |
#define | TWI_PRESCALE_REG TWI_TWSR_PRESCALE0 |
TWI prescale register value. More... | |
#define | TWI_PRESCALER 1 |
#define | TWI_PROCESS 8 |
#define | TWI_READ_DATA 5 |
#define | TWI_READ_ENABLE(SDA) ((SDA & 0xFE) | 0x01) |
TWI Read Enable. More... | |
#define | TWI_STATUS_IO_ERROR -1 |
#define | TWI_STATUS_NO_STATE 1 |
#define | TWI_STATUS_PROTOCOL_ERROR -2 |
#define | TWI_STATUS_RX_COMPLETE 3 |
#define | TWI_STATUS_TX_COMPLETE 2 |
#define | TWI_SUCCESS 0 |
#define | TWI_TRANSAC_FAIL 7 |
#define | TWI_TRANSAC_SUCCESS 6 |
#define | TWI_TWSR_PRESCALE0 0x00 /* TWI Prescale=1. */ |
#define | TWI_TWSR_PRESCALE1 0x01 /* TWI Prescale=4. */ |
#define | TWI_TWSR_PRESCALE2 0x02 /* TWI Prescale=16. */ |
#define | TWI_TWSR_PRESCALE3 0x03 /* TWI Prescale=64. */ |
#define | TWI_TWSR_STATUS_MASK (TWSR & 0xF8) |
TWSR status mask. More... | |
#define | TWI_WRITE_DATA 4 |
#define | TWI_WRITE_ENABLE(SDA) (SDA & 0xFE) |
TWI Write Enable. More... | |
#define | TWI_WRITE_IADDR_READ_DATA 3 |
#define | TWI_WRITE_IADDR_WRITE_DATA 2 |
Enumerations | |
enum | { TWS_BUSERROR = 0x00, TWS_START = 0x08, TWS_RSTART = 0x10, TWS_MT_SLA_ACK = 0x18, TWS_MT_SLA_NACK = 0x20, TWS_MT_DATA_ACK = 0x28, TWS_MT_DATA_NACK = 0x30, TWS_M_ARB_LOST = 0x38, TWS_MR_SLA_ACK = 0x40, TWS_MR_SLA_NACK = 0x48, TWS_MR_DATA_ACK = 0x50, TWS_MR_DATA_NACK = 0x58, TWS_ST_SLA_ACK = 0xA8, TWS_ST_SLA_ACK_M_ARB_LOST = 0xB0, TWS_ST_DATA_ACK = 0xB8, TWS_ST_DATA_NACK = 0xC0, TWS_ST_DATA_ACK_LAST_BYTE = 0xC8, TWS_SR_SLA_ACK = 0x60, TWS_SR_SLA_ACK_M_ARB_LOST = 0x68, TWS_SR_GEN_ACK = 0x70, TWS_SR_GEN_ACK_M_ARB_LOST = 0x78, TWS_SR_SLA_DATA_ACK = 0x80, TWS_SR_SLA_DATA_NACK = 0x88, TWS_SR_GEN_DATA_ACK = 0x90, TWS_SR_GEN_DATA_NACK = 0x98, TWS_SR_STOP_RESTART = 0xA0 } |
TWI status codes. More... | |
enum | twiInternalAddrSize_t { TWI_SLAVE_NO_INTERNAL_ADDRESS, TWI_SLAVE_ONE_BYTE_SIZE, TWI_SLAVE_TWO_BYTE_SIZE, TWI_SLAVE_THREE_BYTE_SIZE } |
internal address size More... | |
Functions | |
static void | twi_interrupt_disable (void) |
Disables interrupt on TWI. More... | |
static void | twi_interrupt_enable (void) |
Enables interrupt on TWI. More... | |
status_code_t | twi_master_get_status (void) |
returns the status of TWI bus More... | |
status_code_t | twi_master_init (volatile void *twi, twi_master_options_t *opt) |
Inits TWI module as master. More... | |
status_code_t | twi_master_read (volatile void *twi, const twi_package_t *package) |
Reads the series of bytes from the TWI bus. More... | |
status_code_t | twi_master_write (volatile void *twi, const twi_package_t *package) |
Perform a TWI master write transfer. More... | |
static uint8_t | twi_read_byte (void) |
reads the data More... | |
static void | twi_reset (void) |
Resets the TWI. More... | |
static void | twi_send_ack (bool ack) |
Enables the ACK/NACK to send for the received data. More... | |
static void | twi_send_start (void) |
Directs the TWI to send start condition. More... | |
static void | twi_send_stop (void) |
Directs TWI to send stop condition. More... | |
status_code_t | twi_slave_init (uint8_t twi_slave_ownadd) |
Initialize TWI as Slave. More... | |
status_code_t | twi_slave_start (slave_data_buffer_t *package) |
Start the slave Transceiver. More... | |
int | twi_slave_state_get (void) |
Get the state of TWI transceiver. More... | |
int | twi_slave_status_get (void) |
Get the Status of TWI transceiver. More... | |
void | twi_slave_status_reset (void) |
Resets the slave state and status to initial for next transmission/reception. More... | |
static void | twi_write_byte (uint8_t data) |
writes the data More... | |
Baud rate register setting calculation.
Baud register setting calculation.
Formula described in datasheet.
Referenced by main(), run_twi_master_recv_test(), run_twi_master_send_test(), and twi_master_setup().
#define TWI_IDLE 1 |
#define TWI_PRESCALE_REG TWI_TWSR_PRESCALE0 |
TWI prescale register value.
Referenced by twi_master_init().
#define TWI_PRESCALER 1 |
#define TWI_PROCESS 8 |
Referenced by twi_interrupt_handler().
#define TWI_READ_DATA 5 |
#define TWI_READ_ENABLE | ( | SDA | ) | ((SDA & 0xFE) | 0x01) |
TWI Read Enable.
Referenced by twi_master_start().
#define TWI_STATUS_IO_ERROR -1 |
Referenced by twi_interrupt_handler().
#define TWI_STATUS_NO_STATE 1 |
Referenced by main(), twi_slave_init(), and twi_slave_status_reset().
#define TWI_STATUS_PROTOCOL_ERROR -2 |
Referenced by twi_interrupt_handler().
#define TWI_STATUS_RX_COMPLETE 3 |
Referenced by main(), and twi_interrupt_handler().
#define TWI_STATUS_TX_COMPLETE 2 |
Referenced by main(), and twi_slave_last_byte_write_done().
#define TWI_SUCCESS 0 |
Referenced by main().
#define TWI_TRANSAC_FAIL 7 |
#define TWI_TRANSAC_SUCCESS 6 |
#define TWI_TWSR_PRESCALE0 0x00 /* TWI Prescale=1. */ |
#define TWI_TWSR_PRESCALE1 0x01 /* TWI Prescale=4. */ |
#define TWI_TWSR_PRESCALE2 0x02 /* TWI Prescale=16. */ |
#define TWI_TWSR_PRESCALE3 0x03 /* TWI Prescale=64. */ |
#define TWI_TWSR_STATUS_MASK (TWSR & 0xF8) |
TWSR status mask.
Referenced by twi_interrupt_handler().
#define TWI_WRITE_DATA 4 |
Referenced by twi_master_internal_addr_write(), twi_master_start(), twi_master_write(), and twi_master_write_done().
#define TWI_WRITE_ENABLE | ( | SDA | ) | (SDA & 0xFE) |
TWI Write Enable.
Referenced by twi_master_start().
#define TWI_WRITE_IADDR_READ_DATA 3 |
Referenced by twi_master_read(), twi_master_start(), and twi_master_write_done().
#define TWI_WRITE_IADDR_WRITE_DATA 2 |
Referenced by twi_master_internal_addr_write(), twi_master_start(), twi_master_write(), and twi_master_write_done().
anonymous enum |
TWI status codes.
|
inlinestatic |
Disables interrupt on TWI.
none. |
|
inlinestatic |
status_code_t twi_master_get_status | ( | void | ) |
returns the status of TWI bus
none |
References master_transfer.
Referenced by twi_master_read(), and twi_master_write().
status_code_t twi_master_init | ( | volatile void * | twi, |
twi_master_options_t * | opt | ||
) |
Inits TWI module as master.
This function is a TWI Master initialisation.
opt | twi setting options (see twi_master_options_t) |
References twi_master_options_t::baud_reg, cpu_irq_disable, cpu_irq_enable, MASTER, STATUS_OK, twi_interrupt_enable(), twi_mode, and TWI_PRESCALE_REG.
status_code_t twi_master_read | ( | volatile void * | twi, |
const twi_package_t * | package | ||
) |
Reads the series of bytes from the TWI bus.
package | - Package information and data (see twi_package_t) |
References ERR_INVALID_ARG, twi_package_t::length, master_transfer, NULL, OPERATION_IN_PROGRESS, twi_master_busy, twi_master_get_status(), TWI_READ_DATA, twi_send_start(), TWI_SLAVE_NO_INTERNAL_ADDRESS, and TWI_WRITE_IADDR_READ_DATA.
Referenced by main(), and run_twi_master_recv_test().
status_code_t twi_master_write | ( | volatile void * | twi, |
const twi_package_t * | package | ||
) |
Perform a TWI master write transfer.
This function is a TWI Master write transaction.
package | - Package information and data (see twi_package_t) |
References ERR_INVALID_ARG, master_transfer, NULL, OPERATION_IN_PROGRESS, twi_master_busy, twi_master_get_status(), twi_send_start(), TWI_SLAVE_NO_INTERNAL_ADDRESS, TWI_WRITE_DATA, and TWI_WRITE_IADDR_WRITE_DATA.
Referenced by main(), and run_twi_master_send_test().
|
inlinestatic |
reads the data
none. |
Referenced by twi_interrupt_handler().
|
inlinestatic |
|
inlinestatic |
Enables the ACK/NACK to send for the received data.
Referenced by twi_master_addr_ack(), and twi_master_read_done().
|
inlinestatic |
Directs the TWI to send start condition.
Referenced by twi_master_read(), twi_master_write(), and twi_master_write_done().
|
inlinestatic |
Directs TWI to send stop condition.
Referenced by twi_master_data_write(), and twi_master_read_last_byte().
status_code_t twi_slave_init | ( | uint8_t | twi_slave_ownadd | ) |
Initialize TWI as Slave.
TWI_ownAddress | - contains Slave own Address |
References slave_transfer, STATUS_OK, TWI_IDLE, and TWI_STATUS_NO_STATE.
Referenced by main(), and twi_slave_setup().
status_code_t twi_slave_start | ( | slave_data_buffer_t * | package | ) |
Start the slave Transceiver.
References OPERATION_IN_PROGRESS, slave_transfer, STATUS_OK, TWI_IDLE, and twi_slave_status_reset().
Referenced by main().
int twi_slave_state_get | ( | void | ) |
Get the state of TWI transceiver.
References slave_transfer.
Referenced by main().
int twi_slave_status_get | ( | void | ) |
Get the Status of TWI transceiver.
Get the Status of TWI transceiver.
References slave_transfer.
Referenced by main().
void twi_slave_status_reset | ( | void | ) |
Resets the slave state and status to initial for next transmission/reception.
References SLAVE, slave_transfer, TWI_IDLE, twi_mode, twi_slave_enable(), and TWI_STATUS_NO_STATE.
Referenced by twi_Receive_Success(), twi_slave_start(), twi_Transmission_Failure(), and twi_Transmit_Success().
|
inlinestatic |
writes the data
data | - an byte for sending. |
References data.
Referenced by twi_master_data_write(), twi_master_internal_addr_write(), and twi_master_start().