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#define | USBHS_RAM_ADDR 0xA0100000u |
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Get maximal number of endpoints
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#define | uhd_get_pipe_max_nbr() (9) |
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#define | USBHS_EPT_NUM (uhd_get_pipe_max_nbr()+1) |
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#define | uhd_get_pipe_bank_max_nbr(ep) ((ep == 0) ? 1 : (( ep <= 2) ? 3 : 2)) |
| Get maximal number of banks of endpoints. More...
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#define | uhd_get_pipe_size_max(ep) (((ep) == 0) ? 64 : 1024) |
| Get maximal size of endpoint (3X, 1024/64) More...
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#define | Is_uhd_pipe_dma_supported(ep) ((((ep) >= 1) && ((ep) <= 7)) ? true : false) |
| Get DMA support of endpoints. More...
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#define | Is_uhd_pipe_high_bw_supported(ep) (((ep) >= 2) ? true : false) |
| Get High Band Width support of endpoints. More...
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#define | uhd_enable_vbus() (USBHS->USBHS_SFR = USBHS_SFR_VBUSRQS) |
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#define | uhd_disable_vbus() (USBHS->USBHS_SCR = USBHS_SCR_VBUSRQC) |
| Requests VBus deactivation. More...
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#define | Is_uhd_vbus_enabled() (Tst_bits(USBHS->USBHS_SR, USBHS_SR_VBUSRQ)) |
| Tests if VBus activation has been requested. More...
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#define | uhd_enable_connection_int() (USBHS->USBHS_HSTIER = USBHS_HSTIER_DCONNIES) |
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#define | uhd_disable_connection_int() (USBHS->USBHS_HSTIDR = USBHS_HSTIDR_DCONNIEC) |
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#define | Is_uhd_connection_int_enabled() (Tst_bits(USBHS->USBHS_HSTIMR, USBHS_HSTIMR_DCONNIE)) |
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#define | uhd_ack_connection() (USBHS->USBHS_HSTICR = USBHS_HSTICR_DCONNIC) |
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#define | Is_uhd_connection() (Tst_bits(USBHS->USBHS_HSTISR, USBHS_HSTISR_DCONNI)) |
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#define | uhd_raise_connection() (USBHS->USBHS_HSTIFR = USBHS_HSTIFR_DCONNIS) |
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#define | uhd_enable_disconnection_int() (USBHS->USBHS_HSTIER = USBHS_HSTIER_DDISCIES) |
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#define | uhd_disable_disconnection_int() (USBHS->USBHS_HSTIDR = USBHS_HSTIDR_DDISCIEC) |
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#define | Is_uhd_disconnection_int_enabled() (Tst_bits(USBHS->USBHS_HSTIMR, USBHS_HSTIMR_DDISCIE)) |
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#define | uhd_ack_disconnection() (USBHS->USBHS_HSTICR = USBHS_HSTICR_DDISCIC) |
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#define | Is_uhd_disconnection() (Tst_bits(USBHS->USBHS_HSTISR, USBHS_HSTISR_DDISCI)) |
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#define | uhd_raise_disconnection() (USBHS->USBHS_HSTIFR = USBHS_HSTIFR_DDISCIS) |
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#define | uhd_get_speed_mode() (Rd_bits(USBHS->USBHS_SR, USBHS_SR_SPEED_Msk)) |
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#define | Is_uhd_low_speed_mode() (uhd_get_speed_mode() == USBHS_SR_SPEED_LOW_SPEED) |
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#define | Is_uhd_full_speed_mode() (uhd_get_speed_mode() == USBHS_SR_SPEED_FULL_SPEED) |
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#define | Is_uhd_high_speed_mode() (uhd_get_speed_mode() == USBHS_SR_SPEED_HIGH_SPEED) |
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#define | uhd_enable_high_speed_mode() (Wr_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_SPDCONF_Msk, USBHS_HSTCTRL_SPDCONF_HIGH_SPEED)) |
| Enable high speed mode. More...
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#define | uhd_disable_high_speed_mode() (Wr_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_SPDCONF_Msk, USBHS_HSTCTRL_SPDCONF_FORCED_FS)) |
| Disable high speed mode. More...
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These macros manage the bus events: reset, SOF, resume, wakeup.
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#define | uhd_start_reset() (Set_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_RESET)) |
| Initiates a reset event. More...
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#define | Is_uhd_starting_reset() (Tst_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_RESET)) |
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#define | uhd_stop_reset() (Clr_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_RESET)) |
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#define | uhd_enable_reset_sent_interrupt() (USBHS->USBHS_HSTIER = USBHS_HSTIER_RSTIES) |
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#define | uhd_disable_reset_sent_interrupt() (USBHS->USBHS_HSTIDR = USBHS_HSTIDR_RSTIEC) |
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#define | Is_uhd_reset_sent_interrupt_enabled() (Tst_bits(USBHS->USBHS_HSTIMR, USBHS_HSTIMR_RSTIE)) |
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#define | uhd_ack_reset_sent() (USBHS->USBHS_HSTICR = USBHS_HSTICR_RSTIC) |
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#define | Is_uhd_reset_sent() (Tst_bits(USBHS->USBHS_HSTISR, USBHS_HSTISR_RSTI)) |
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#define | uhd_enable_sof() (Set_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_SOFE)) |
| Initiates a SOF events. More...
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#define | uhd_disable_sof() (Clr_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_SOFE)) |
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#define | Is_uhd_sof_enabled() (Tst_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_SOFE)) |
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#define | uhd_get_sof_number() ((USBHS->USBHS_HSTFNUM & USBHS_HSTFNUM_FNUM_Msk) >> USBHS_HSTFNUM_FNUM_Pos) |
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#define | uhd_get_microsof_number() |
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#define | uhd_get_frame_position() (Rd_bitfield(USBHS->USBHS_HSTFNUM, USBHS_HSTFNUM_FLENHIGH_Msk)) |
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#define | uhd_enable_sof_interrupt() (USBHS->USBHS_HSTIER = USBHS_HSTIER_HSOFIES) |
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#define | uhd_disable_sof_interrupt() (USBHS->USBHS_HSTIDR = USBHS_HSTIDR_HSOFIEC) |
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#define | Is_uhd_sof_interrupt_enabled() (Tst_bits(USBHS->USBHS_HSTIMR, USBHS_HSTIMR_HSOFIE)) |
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#define | uhd_ack_sof() (USBHS->USBHS_HSTICR = USBHS_HSTICR_HSOFIC) |
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#define | Is_uhd_sof() (Tst_bits(USBHS->USBHS_HSTISR, USBHS_HSTISR_HSOFI)) |
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#define | uhd_send_resume() (Set_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_RESUME)) |
| Initiates a resume event It is called downstream resume event. More...
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#define | Is_uhd_sending_resume() (Tst_bits(USBHS->USBHS_HSTCTRL, USBHS_HSTCTRL_RESUME)) |
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#define | uhd_enable_downstream_resume_interrupt() (USBHS->USBHS_HSTIER = USBHS_HSTIER_RSMEDIES) |
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#define | uhd_disable_downstream_resume_interrupt() (USBHS->USBHS_HSTIDR = USBHS_HSTIDR_RSMEDIEC) |
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#define | Is_uhd_downstream_resume_interrupt_enabled() (Tst_bits(USBHS->USBHS_HSTIMR, USBHS_HSTIMR_RSMEDIE)) |
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#define | uhd_ack_downstream_resume() (USBHS->USBHS_HSTICR = USBHS_HSTICR_RSMEDIC) |
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#define | Is_uhd_downstream_resume() (Tst_bits(USBHS->USBHS_HSTISR, USBHS_HSTISR_RSMEDI)) |
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#define | uhd_enable_wakeup_interrupt() (USBHS->USBHS_HSTIER = USBHS_HSTIER_HWUPIES) |
| Detection of a wake-up event A wake-up event is received when the host controller is in the suspend mode: More...
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#define | uhd_disable_wakeup_interrupt() (USBHS->USBHS_HSTIDR = USBHS_HSTIDR_HWUPIEC) |
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#define | Is_uhd_wakeup_interrupt_enabled() (Tst_bits(USBHS->USBHS_HSTIMR, USBHS_HSTIMR_HWUPIE)) |
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#define | uhd_ack_wakeup() (USBHS->USBHS_HSTICR = USBHS_HSTICR_HWUPIC) |
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#define | Is_uhd_wakeup() (Tst_bits(USBHS->USBHS_HSTISR, USBHS_HSTISR_HWUPI)) |
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#define | uhd_enable_upstream_resume_interrupt() (USBHS->USBHS_HSTIER = USBHS_HSTIER_RXRSMIES) |
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#define | uhd_disable_upstream_resume_interrupt() (USBHS->USBHS_HSTIDR = USBHS_HSTIDR_RXRSMIEC) |
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#define | Is_uhd_upstream_resume_interrupt_enabled() (Tst_bits(USBHS->USBHS_HSTIMR, USBHS_HSTIMR_RXRSMIE)) |
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#define | uhd_ack_upstream_resume() (USBHS->USBHS_HSTICR = USBHS_HSTICR_RXRSMIC) |
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#define | Is_uhd_upstream_resume() (Tst_bits(USBHS->USBHS_HSTISR, USBHS_HSTISR_RXRSMI)) |
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#define | uhd_configure_address(p, addr) |
| USB address of pipes. More...
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#define | uhd_get_configured_address(p) |
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#define | uhd_enable_pipe(p) (Set_bits(USBHS->USBHS_HSTPIP, USBHS_HSTPIP_PEN0 << (p))) |
| Pipe enable Enable, disable, reset, freeze. More...
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#define | uhd_disable_pipe(p) (Clr_bits(USBHS->USBHS_HSTPIP, USBHS_HSTPIP_PEN0 << (p))) |
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#define | Is_uhd_pipe_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIP, USBHS_HSTPIP_PEN0 << (p))) |
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#define | uhd_reset_pipe(p) |
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#define | Is_uhd_resetting_pipe(p) (Tst_bits(USBHS->USBHS_HSTPIP, USBHS_HSTPIP_PRST0 << (p))) |
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#define | uhd_freeze_pipe(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_PFREEZES) |
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#define | uhd_unfreeze_pipe(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_PFREEZEC) |
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#define | Is_uhd_pipe_frozen(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_PFREEZE)) |
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#define | uhd_reset_data_toggle(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_RSTDTS) |
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#define | Is_uhd_data_toggle_reset(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_RSTDT)) |
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#define | uhd_configure_pipe_int_req_freq(p, freq) (Wr_bitfield(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_INTFRQ_Msk, (freq))) |
| Pipe configuration. More...
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#define | uhd_get_pipe_int_req_freq(p) (Rd_bitfield(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_INTFRQ_Msk)) |
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#define | uhd_configure_pipe_endpoint_number(p, ep) (Wr_bitfield(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PEPNUM_Msk, (ep))) |
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#define | uhd_get_pipe_endpoint_address(p) |
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#define | uhd_get_pipe_endpoint_number(p) (Rd_bitfield(USBHS->USBHS_HSTPIPCFG[p], (USBHS_HSTPIPCFG_PEPNUM_Msk))) |
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#define | uhd_configure_pipe_type(p, type) (Wr_bitfield(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PTYPE_Msk, type)) |
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#define | uhd_get_pipe_type(p) (Rd_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PTYPE_Msk)) |
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#define | Is_uhd_pipe_int(p) ((USBHS->USBHS_HSTPIPCFG[p] & USBHS_HSTPIPCFG_PTYPE_Msk)==USBHS_HSTPIPCFG_PTYPE_INTRPT) |
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#define | Is_uhd_pipe_iso(p) ((USBHS->USBHS_HSTPIPCFG[p] & USBHS_HSTPIPCFG_PTYPE_Msk)==USBHS_HSTPIPCFG_PTYPE_ISO) |
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#define | Is_uhd_pipe_bulk(p) ((USBHS->USBHS_HSTPIPCFG[p] & USBHS_HSTPIPCFG_PTYPE_Msk)==USBHS_HSTPIPCFG_PTYPE_BLK) |
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#define | Is_uhd_pipe_bulk_in(p) ((USBHS->USBHS_HSTPIPCFG[p] & (USBHS_HSTPIPCFG_PTYPE_Msk|USBHS_HSTPIPCFG_PTOKEN_Msk))==(USBHS_HSTPIPCFG_PTYPE_BLK|USBHS_HSTPIPCFG_PTOKEN_IN)) |
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#define | uhd_enable_pipe_bank_autoswitch(p) (Set_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_AUTOSW)) |
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#define | uhd_disable_pipe_bank_autoswitch(p) (Clr_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_AUTOSW)) |
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#define | Is_uhd_pipe_bank_autoswitch_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_AUTOSW)) |
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#define | uhd_configure_pipe_token(p, token) (Wr_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PTOKEN_Msk, token)) |
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#define | uhd_get_pipe_token(p) (Rd_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PTOKEN_Msk)) |
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#define | uhd_is_pipe_in(p) (USBHS_HSTPIPCFG_PTOKEN_IN==uhd_get_pipe_token(p)) |
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#define | uhd_is_pipe_out(p) (USBHS_HSTPIPCFG_PTOKEN_OUT==uhd_get_pipe_token(p)) |
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#define | Is_uhd_pipe_in(p) (USBHS_HSTPIPCFG_PTOKEN_IN==uhd_get_pipe_token(p)) |
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#define | Is_uhd_pipe_out(p) (USBHS_HSTPIPCFG_PTOKEN_OUT==uhd_get_pipe_token(p)) |
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#define | uhd_format_pipe_size(size) (32 - clz(((uint32_t)min(max(size, 8), 1024) << 1) - 1) - 1 - 3) |
| Bounds given integer size to allowed range and rounds it up to the nearest available greater size, then applies register format of USBHS controller for pipe size bit-field. More...
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#define | uhd_configure_pipe_size(p, size) (Wr_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PSIZE_Msk, uhd_format_pipe_size(size))) |
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#define | uhd_get_pipe_size(p) (8<<((Rd_bits(USBHS->USBHS_HSTPIPCFG[p], (USBHS_HSTPIPCFG_PSIZE_Msk)))>> USBHS_HSTPIPCFG_PSIZE_Pos)) |
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#define | uhd_configure_pipe_bank(p, bank) (Wr_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PBK_Msk, (bank))) |
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#define | uhd_get_pipe_bank(p) (Rd_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PBK_Msk)) |
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#define | uhd_allocate_memory(p) (Set_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_ALLOC)) |
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#define | uhd_unallocate_memory(p) (Clr_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_ALLOC)) |
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#define | Is_uhd_memory_allocated(p) (Tst_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_ALLOC)) |
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#define | uhd_enable_ping(p) (Set_bits(USBHS->USBHS_HSTPIPCFG[p], USBHS_HSTPIPCFG_PINGEN)) |
| Enable PING management only available in HS mode. More...
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#define | uhd_configure_pipe(p, freq, ep_num, type, token, size, bank, bank_switch) |
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#define | Is_uhd_pipe_configured(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_CFGOK)) |
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#define | uhd_enable_overflow_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_OVERFIES) |
| Pipe overflow and underflow for isochronous and interrupt endpoints. More...
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#define | uhd_disable_overflow_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_OVERFIEC) |
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#define | Is_uhd_overflow_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_OVERFIE)) |
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#define | uhd_ack_overflow_interrupt(p) (USBHS->USBHS_HSTPIPICR[p] = USBHS_HSTPIPICR_OVERFIC) |
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#define | Is_uhd_overflow(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_OVERFI)) |
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#define | uhd_enable_underflow_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_UNDERFIES) |
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#define | uhd_disable_underflow_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_UNDERFIEC) |
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#define | Is_uhd_underflow_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_UNDERFIE)) |
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#define | uhd_ack_underflow_interrupt(p) (USBHS->USBHS_HSTPIPICR[p] = USBHS_HSTPIPICR_UNDERFIC) |
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#define | Is_uhd_underflow(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_UNDERFI)) |
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#define | uhd_enable_stall_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_RXSTALLDES) |
| USB packet errors management. More...
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#define | uhd_disable_stall_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_RXSTALLDEC) |
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#define | Is_uhd_stall_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_RXSTALLDE)) |
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#define | uhd_ack_stall(p) (USBHS->USBHS_HSTPIPICR[p] = USBHS_HSTPIPICR_RXSTALLDIC) |
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#define | Is_uhd_stall(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_RXSTALLDI)) |
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#define | uhd_enable_pipe_error_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_PERRES) |
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#define | uhd_disable_pipe_error_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_PERREC) |
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#define | Is_uhd_pipe_error_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_PERRE)) |
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#define | uhd_ack_all_errors(p) (USBHS->USBHS_HSTPIPERR[p] = 0UL) |
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#define | Is_uhd_pipe_error(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_PERRI)) |
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#define | uhd_error_status(p) (USBHS->USBHS_HSTPIPERR[p]) |
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#define | Is_uhd_bad_data_toggle(p) (Tst_bits(USBHS->USBHS_HSTPIPERR[p], USBHS_HSTPIPERR_DATATGL)) |
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#define | Is_uhd_data_pid_error(p) (Tst_bits(USBHS->USBHS_HSTPIPERR[p], USBHS_HSTPIPERR_DATAPID)) |
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#define | Is_uhd_pid_error(p) (Tst_bits(USBHS->USBHS_HSTPIPERR[p], USBHS_HSTPIPERR_PID)) |
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#define | Is_uhd_timeout_error(p) (Tst_bits(USBHS->USBHS_HSTPIPERR[p], USBHS_HSTPIPERR_TIMEOUT)) |
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#define | Is_uhd_crc16_error(p) (Tst_bits(USBHS->USBHS_HSTPIPERR[p], USBHS_HSTPIPERR_CRC16)) |
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#define | uhd_get_error_counter(p) (Rd_bits(USBHS->USBHS_HSTPIPERR[p], USBHS_HSTPIPERR_COUNTER)) |
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#define | uhd_data_toggle(p) (Rd_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_DTSEQ)) |
| Pipe data management. More...
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#define | uhd_enable_bank_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_NBUSYBKES) |
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#define | uhd_disable_bank_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_NBUSYBKEC) |
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#define | Is_uhd_bank_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_NBUSYBKE)) |
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#define | uhd_nb_busy_bank(p) (Rd_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_NBUSYBK_Msk)) |
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#define | uhd_current_bank(p) (Rd_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_CURRBK_Msk)) |
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#define | uhd_enable_short_packet_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_SHORTPACKETIES) |
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#define | uhd_disable_short_packet_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_SHORTPACKETIEC) |
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#define | Is_uhd_short_packet_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_SHORTPACKETIE)) |
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#define | uhd_ack_short_packet(p) (USBHS->USBHS_HSTPIPICR[p] = USBHS_HSTPIPICR_SHORTPACKETIC) |
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#define | Is_uhd_short_packet(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_SHORTPACKETI)) |
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#define | uhd_byte_count(p) (Rd_bitfield(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_PBYCT_Msk)) |
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#define | Is_uhd_fifocon(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_FIFOCON)) |
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#define | uhd_ack_fifocon(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_FIFOCONC) |
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#define | uhd_enable_setup_ready_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_TXSTPES) |
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#define | uhd_disable_setup_ready_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_TXSTPEC) |
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#define | Is_uhd_setup_ready_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_TXSTPE)) |
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#define | uhd_ack_setup_ready(p) (USBHS->USBHS_HSTPIPICR[p] = USBHS_HSTPIPICR_TXSTPIC) |
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#define | Is_uhd_setup_ready(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_TXSTPI)) |
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#define | uhd_enable_in_received_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_RXINES) |
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#define | uhd_disable_in_received_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_RXINEC) |
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#define | Is_uhd_in_received_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_RXINE)) |
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#define | uhd_ack_in_received(p) (USBHS->USBHS_HSTPIPICR[p] = USBHS_HSTPIPICR_RXINIC) |
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#define | Is_uhd_in_received(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_RXINI)) |
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#define | uhd_enable_out_ready_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_TXOUTES) |
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#define | uhd_disable_out_ready_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_TXOUTEC) |
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#define | Is_uhd_out_ready_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_TXOUTE)) |
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#define | uhd_ack_out_ready(p) (USBHS->USBHS_HSTPIPICR[p] = USBHS_HSTPIPICR_TXOUTIC) |
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#define | Is_uhd_out_ready(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_TXOUTI)) |
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#define | uhd_raise_out_ready(p) (USBHS->USBHS_HSTPIPIFR[p] = USBHS_HSTPIPIFR_TXOUTIS) |
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#define | uhd_enable_nak_received_interrupt(p) (USBHS->USBHS_HSTPIPIER[p] = USBHS_HSTPIPIER_NAKEDES) |
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#define | uhd_disable_nak_received_interrupt(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_NAKEDEC) |
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#define | Is_uhd_nak_received_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_NAKEDE)) |
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#define | uhd_ack_nak_received(p) (USBHS->USBHS_HSTPIPICR[p] = USBHS_HSTPIPICR_NAKEDIC) |
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#define | Is_uhd_nak_received(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_NAKEDI)) |
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#define | Is_uhd_read_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_RWALL)) |
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#define | Is_uhd_write_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTPIPISR_RWALL)) |
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#define | uhd_enable_continuous_in_mode(p) (Set_bits(USBHS->USBHS_HSTPIPINRQ[p], USBHS_HSTPIPINRQ_INMODE)) |
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#define | uhd_disable_continuous_in_mode(p) (Clr_bits(USBHS->USBHS_HSTPIPINRQ[p], USBHS_HSTPIPINRQ_INMODE)) |
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#define | Is_uhd_continuous_in_mode_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPINRQ[p], USBHS_HSTPIPINRQ_INMODE)) |
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#define | uhd_in_request_number(p, in_num) (Wr_bits(USBHS->USBHS_HSTPIPINRQ[p], USBHS_HSTPIPINRQ_INRQ_Msk, (in_num)-1)) |
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#define | uhd_get_in_request_number(p) (((Rd_bits(USBHS->USBHS_HSTPIPINRQ[p], USBHS_HSTPIPINRQ_INRQ_Msk))>>USBHS_HSTPIPINRQ_INRQ_Pos)+1) |
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#define | uhd_enable_pipe_interrupt(p) (USBHS->USBHS_HSTIER = (USBHS_HSTIER_PEP_0 << (p))) |
| Pipe main interrupts management. More...
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#define | uhd_disable_pipe_interrupt(p) (USBHS->USBHS_HSTIDR = (USBHS_HSTIDR_PEP_0 << (p))) |
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#define | Is_uhd_pipe_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTIMR, USBHS_HSTIMR_PEP_0 << (p))) |
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#define | Is_uhd_pipe_interrupt(p) (Tst_bits(USBHS->USBHS_HSTISR, USBHS_HSTISR_PEP_0 << (p))) |
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static uint8_t | uhd_get_interrupt_pipe_number (void) |
| returns the lowest pipe number generating a pipe interrupt or USBHS_EPT_NUM if none More...
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#define | UHD_PIPE_MAX_TRANS 0x8000 |
| Pipe DMA management. More...
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#define | uhd_get_pipe_fifo_access(p, scale) (((volatile TPASTE2(U, scale) (*)[UHD_PIPE_MAX_TRANS / ((scale) / 8)])USBHS_RAM_ADDR)[(p)]) |
| Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected pipe. More...
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#define | uhd_enable_pipe_int_dis_hdma_req(p) (USBHS->USBHS_HSTPIPIMR[p] = USBHS_HSTPIPIMR_PDISHDMA) |
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#define | uhd_disable_pipe_int_dis_hdma_req(p) (USBHS->USBHS_HSTPIPIDR[p] = USBHS_HSTPIPIDR_PDISHDMAC) |
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#define | Is_uhd_pipe_int_dis_hdma_req_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTPIPIMR_PDISHDMA)) |
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#define | uhd_enable_pipe_dma_interrupt(p) (USBHS->USBHS_HSTIER = (USBHS_HSTIER_DMA_1<<((p)-1))) |
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#define | uhd_disable_pipe_dma_interrupt(p) (USBHS->USBHS_HSTIDR = (USBHS_HSTIDR_DMA_1<<((p)-1))) |
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#define | Is_uhd_pipe_dma_interrupt_enabled(p) (Tst_bits(USBHS->USBHS_HSTPIPIMR[p], USBHS_HSTIMR_DMA_1<<((p)-1))) |
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#define | Is_uhd_pipe_dma_interrupt(p) (Tst_bits(USBHS->USBHS_HSTPIPISR[p], USBHS_HSTISR_DMA_1<<((p)-1))) |
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#define | UHD_ENDPOINT_DMA_STOP_NOW (0) |
| DMA channel control command. More...
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#define | UHD_ENDPOINT_DMA_RUN_AND_STOP (USBHS_HSTDMACONTROL_CHANN_ENB) |
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#define | UHD_ENDPOINT_DMA_LOAD_NEXT_DESC (USBHS_HSTDMACONTROL_LDNXT_DSC) |
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#define | UHD_ENDPOINT_DMA_RUN_AND_LINK (USBHS_HSTDMACONTROL_CHANN_ENB|USBHS_HSTDMACONTROL_LDNXT_DSC) |
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#define | USBHS_UHDMA_ARRAY(ep) (((volatile usbhs_uhdmach_t *)USBHS->USBHS_HSTDMA)[(ep) - 1]) |
| Structure for DMA registers. More...
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#define | uhd_pipe_dma_set_control(p, desc) (USBHS_UHDMA_ARRAY(p).control=desc) |
| Set control desc to selected endpoint DMA channel. More...
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#define | uhd_pipe_dma_get_control(p) (USBHS_UHDMA_ARRAY(p).control) |
| Get control desc to selected endpoint DMA channel. More...
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#define | uhd_pipe_dma_set_addr(p, add) (USBHS_UHDMA_ARRAY(p).addr=add) |
| Set RAM address to selected endpoint DMA channel. More...
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#define | uhd_pipe_dma_get_addr(p) (USBHS_UHDMA_ARRAY(p).addr) |
| Get RAM address from selected endpoint DMA channel. More...
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#define | uhd_pipe_dma_get_status(p) (USBHS_UHDMA_ARRAY(p).status) |
| Get status to selected endpoint DMA channel. More...
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typedef struct
sam_usbhs_uhdmadesc_t | usbhs_uhdmadesc_t |
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typedef struct sam_usbhs_uhdmach_t | usbhs_uhdmach_t |
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static uint8_t | uhd_get_pipe_dma_interrupt_number (void) |
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