See Quick Start Guide for the System Clock Management service (UC3C).

The sysclk API covers the system clock and all clocks derived from it. The system clock is a chip-internal clock on which all synchronous clocks, i.e. CPU and bus/peripheral clocks, are based. The system clock is typically generated from one of a variety of sources, which may include crystal and RC oscillators as well as PLLs. The clocks derived from the system clock are sometimes also known as synchronous clocks, since they always run synchronously with respect to each other, as opposed to generic clocks which may run from different oscillators or PLLs.

Most applications should simply call sysclk_init() to initialize everything related to the system clock and its source (oscillator, PLL or DFLL), and leave it at that. More advanced applications, and platform-specific drivers, may require additional services from the clock system, some of which may be platform-specific.

Platform Dependencies

The sysclk API is partially chip- or platform-specific. While all platforms provide mostly the same functionality, there are some variations around how different bus types and clock tree structures are handled.

The following functions are available on all platforms with the same parameters and functionality. These functions may be called freely by portable applications, drivers and services:

The following functions are available on all platforms, but there may be variations in the function signature (i.e. parameters) and behavior. These functions are typically called by platform-specific parts of drivers, and applications that aren't intended to be portable:

sysclk_enable_peripheral_clock()
sysclk_disable_peripheral_clock()
sysclk_enable_module()
sysclk_disable_module()
sysclk_module_is_enabled()
sysclk_set_prescalers()

All other functions should be considered platform-specific. Enabling/disabling clocks to specific peripherals as well as determining the speed of these clocks should be done by calling functions provided by the driver for that peripheral.

Modules
	System Clock internals

Macros
#define	CONFIG_SYSCLK_INIT_HSBMASK
	Configuration symbol for the HSB clocks enabled at power-on after the sysclock module has been initialized. More...

#define	CONFIG_USBCLK_DIV
	Configuration symbol for the USB generic clock divider setting. More...

#define	CONFIG_USBCLK_SOURCE
	Configuration symbol for the USB generic clock source. More...

#define	USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_SCIF_RCOSC_FREQUENCY))
	Number of us to wait for USB clock to start. More...

Functions
void	sysclk_disable_usb (void)
	Disable the USB generic clock. More...

void	sysclk_enable_usb (void)
	Enable the USB generic clock. More...

void	sysclk_priv_disable_module (unsigned int bus_id, unsigned int module_index)
	Disable a maskable module clock. More...

void	sysclk_priv_enable_module (unsigned int bus_id, unsigned int module_index)
	Enable a maskable module clock. More...

System Clock Initialization
void	sysclk_init (void)
	Initialize the synchronous clock system. More...

Configuration Symbols
#define	CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS
	Initial/static main system clock source. More...

#define	CONFIG_SYSCLK_CPU_DIV 0
	Initial/static CPU/HSB/PBB clock divider (log2) More...

#define	CONFIG_SYSCLK_PBA_DIV 0
	Initial/static PBA clock divider (log2) More...

#define	CONFIG_SYSCLK_PBB_DIV 0
	Initial/static PBB clock divider (log2) More...

#define	CONFIG_SYSCLK_PBC_DIV 0
	Initial/static PBC clock divider (log2) More...

#define	CONFIG_SYSCLK_INIT_CPUMASK
	Configuration symbol for the CPU clocks enabled at power-on after the sysclock module has been initialized. More...

#define	CONFIG_SYSCLK_INIT_PBAMASK
	Configuration symbol for the PBA clocks enabled at power-on after the sysclock module has been initialized. More...

#define	CONFIG_SYSCLK_INIT_PBBMASK
	Configuration symbol for the PBB clocks enabled at power-on after the sysclock module has been initialized. More...

#define	CONFIG_SYSCLK_INIT_PBCMASK
	Configuration symbol for the PBC clocks enabled at power-on after the sysclock module has been initialized. More...

System clock source
#define	SYSCLK_SRC_RCSYS 0
	System RC oscillator. More...

#define	SYSCLK_SRC_OSC0 1
	Oscillator 0. More...

#define	SYSCLK_SRC_OSC1 2
	Oscillator 1. More...

#define	SYSCLK_SRC_PLL0 3
	Phase Locked Loop 0. More...

#define	SYSCLK_SRC_PLL1 4
	Phase Locked Loop 1. More...

#define	SYSCLK_SRC_RC8M 5
	8 MHz RC oscillator More...

#define	SYSCLK_SRC_RC120M 7
	120 MHz RC oscillator More...

USB Clock Sources
#define	USBCLK_SRC_OSC0 GENCLK_SRC_OSC0
	Use OSC0. More...

#define	USBCLK_SRC_OSC1 GENCLK_SRC_OSC1
	Use OSC1. More...

#define	USBCLK_SRC_PLL0 GENCLK_SRC_PLL0
	Use PLL0. More...

#define	USBCLK_SRC_PLL1 GENCLK_SRC_PLL1
	Use PLL1. More...

Clocks derived from the CPU clock
#define	SYSCLK_OCD AVR32_OCD_CLK_CPU
	On-Chip Debug system. More...

#define	SYSCLK_SYSTIMER AVR32_CORE_CLK_CPU_COUNT
	COUNT/COMPARE system registers. More...

Clocks derived from the HSB clock
#define	SYSCLK_SAU_HSB (AVR32_SAU_CLK_HSB % 32)
	Secure Access Unit HSB interface. More...

#define	SYSCLK_PDCA_HSB (AVR32_PDCA_CLK_HSB % 32)
	PDCA memory interface. More...

#define	SYSCLK_MDMA_HSB (AVR32_MDMA_CLK_HSB % 32)
	MDMA memory interface. More...

#define	SYSCLK_USBC_DATA (AVR32_USBC_CLK_HSB % 32)
	USBC DMA and FIFO interface. More...

#define	SYSCLK_CANIF_DATA (AVR32_CANIF_CLK_HSB % 32)
	CANIF DMA interface. More...

#define	SYSCLK_FLASHC_DATA (AVR32_FLASHC_CLK_HSB % 32)
	Flash data interface. More...

#define	SYSCLK_PBA_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32)
	HSB<->PBA bridge. More...

#define	SYSCLK_PBB_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32)
	HSB<->PBB bridge. More...

#define	SYSCLK_PBC_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBC_BRIDGE % 32)
	HSB<->PBC bridge. More...

#define	SYSCLK_HSB_RAM (AVR32_RAM_CLK_HSB % 32)
	HSB RAM. More...

#define	SYSCLK_EBI (AVR32_EBI_CLK_HSB % 32)
	External Bus Interface. More...

#define	SYSCLK_PEVC_HSB (AVR32_PEVC_CLK_HSB % 32)
	Peripheral Event Controller. More...

Clocks derived from the PBA clock
#define	SYSCLK_INTC (AVR32_INTC_CLK_PBA % 32)
	Internal interrupt controller. More...

#define	SYSCLK_PM (AVR32_PM_CLK_PBA % 32)
	PM/RTC/EIM configuration. More...

#define	SYSCLK_SCIF (AVR32_SCIF_CLK_PBA % 32)
	System Control Interface. More...

#define	SYSCLK_AST (AVR32_AST_CLK_PBA % 32)
	Asynchronous Timer. More...

#define	SYSCLK_WDT (AVR32_WDT_CLK_PBA % 32)
	Watchdog Timer. More...

#define	SYSCLK_EIC (AVR32_EIC_CLK_PBA % 32)
	External Interrupt Controller. More...

#define	SYSCLK_FREQM (AVR32_FREQM_CLK_PBA % 32)
	Frequency Meter. More...

#define	SYSCLK_GPIO (AVR32_GPIO_CLK_PBA % 32)
	General-Purpose I/O. More...

#define	SYSCLK_USART0 (AVR32_USART0_CLK_PBA % 32)
	USART 0. More...

#define	SYSCLK_USART2 (AVR32_USART2_CLK_PBA % 32)
	USART 2. More...

#define	SYSCLK_USART3 (AVR32_USART3_CLK_PBA % 32)
	USART 3. More...

#define	SYSCLK_SPI1 (AVR32_SPI1_CLK_PBA % 32)
	SPI Controller 1. More...

#define	SYSCLK_TWIM0 (AVR32_TWIM0_CLK_PBA % 32)
	TWI Master 0. More...

#define	SYSCLK_TWIM1 (AVR32_TWIM1_CLK_PBA % 32)
	TWI Master 1. More...

#define	SYSCLK_TWIS0 (AVR32_TWIS0_CLK_PBA % 32)
	TWI Slave 0. More...

#define	SYSCLK_TWIS1 (AVR32_TWIS1_CLK_PBA % 32)
	TWI Slave 1. More...

#define	SYSCLK_IISC (AVR32_IISC_CLK_PBA % 32)
	Inter-IC Sound (I2S) Controller. More...

#define	SYSCLK_PWM (AVR32_PWM_CLK_PBA % 32)
	Pulse Width Modulator. More...

#define	SYSCLK_QDEC0 (AVR32_QDEC0_CLK_PBA % 32)
	Quadrature Decoder 0. More...

#define	SYSCLK_QDEC1 (AVR32_QDEC1_CLK_PBA % 32)
	Quadrature Decoder 1. More...

#define	SYSCLK_TC1 (AVR32_TC1_CLK_PBA % 32)
	Timer/Counter 1. More...

#define	SYSCLK_PEVC_REGS (AVR32_PEVC_CLK_PBA % 32)
	Peripheral Event Controller. More...

#define	SYSCLK_ACIFA0 (AVR32_ACIFA0_CLK_PBA % 32)
	Analog Comparator 0. More...

#define	SYSCLK_ACIFA1 (AVR32_ACIFA1_CLK_PBA % 32)
	Analog Comparator 1. More...

#define	SYSCLK_DACIFB0 (AVR32_DACIFB0_CLK_PBA % 32)
	D/A Converter 0. More...

#define	SYSCLK_DACIFB1 (AVR32_DACIFB1_CLK_PBA % 32)
	D/A Converter 1. More...

#define	SYSCLK_AW (AVR32_AW_CLK_PBA % 32)
	aWire UART More...

Clocks derived from the PBB clock
#define	SYSCLK_FLASHC_REGS (AVR32_FLASHC_CLK_PBB % 32)
	Flash Controller registers. More...

#define	SYSCLK_USBC_REGS (AVR32_USBC_CLK_PBB % 32)
	USBB registers. More...

#define	SYSCLK_HMATRIX (AVR32_HMATRIX_CLK_PBB % 32)
	HSB Matrix configuration. More...

#define	SYSCLK_SAU_REGS (AVR32_SAU_CLK_PBB % 32)
	Secure Access Unit register. More...

#define	SYSCLK_SMC_REGS (AVR32_SMC_CLK_PBB % 32)
	Static Memory Controller registers. More...

#define	SYSCLK_SDRAMC_REGS (AVR32_SDRAMC_CLK_PBB % 32)
	SDRAM Controller registers. More...

#define	SYSCLK_MACB_REGS (AVR32_MACB_CLK_PBB % 32)
	Ethernet MAC registers. More...

Clocks derived from the PBC clock
#define	SYSCLK_PDCA_PB (AVR32_PDCA_CLK_PBC % 32)
	PDCA peripheral bus interface. More...

#define	SYSCLK_MDMA_REGS (AVR32_MDMA_CLK_PBC % 32)
	MDMA registers. More...

#define	SYSCLK_USART1 (AVR32_USART1_CLK_PBC % 32)
	USART 1. More...

#define	SYSCLK_SPI0 (AVR32_SPI0_CLK_PBC % 32)
	SPI Controller 0. More...

#define	SYSCLK_CANIF_REGS (AVR32_CANIF_CLK_PBC % 32)
	CANIF registers. More...

#define	SYSCLK_TC0 (AVR32_TC0_CLK_PBC % 32)
	Timer/Counter 0. More...

#define	SYSCLK_ADCIFA (AVR32_ADCIFA_CLK_PBC % 32)
	A/D Converter. More...

#define	SYSCLK_USART4 (AVR32_USART4_CLK_PBC % 32)
	USART 4. More...

#define	SYSCLK_TWIM2 (AVR32_TWIM2_CLK_PBC % 32)
	TWI Master 2. More...

#define	SYSCLK_TWIS2 (AVR32_TWIS2_CLK_PBC % 32)
	TWI Slave 2. More...

Querying the system clock and its derived clocks
The following functions may be used to query the current frequency of the system clock and the CPU and bus clocks derived from it. sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be available on all platforms, although some platforms may define additional accessors for various chip-internal bus clocks. These are usually not intended to be queried directly by generic code.
static uint32_t	sysclk_get_main_hz (void)
	Return the current rate in Hz of the main system clock. More...

static uint32_t	sysclk_get_cpu_hz (void)
	Return the current rate in Hz of the CPU clock. More...

static uint32_t	sysclk_get_hsb_hz (void)
	Return the current rate in Hz of the High-Speed Bus clock. More...

static uint32_t	sysclk_get_pba_hz (void)
	Return the current rate in Hz of the Peripheral Bus A clock. More...

static uint32_t	sysclk_get_pbb_hz (void)
	Return the current rate in Hz of the Peripheral Bus B clock. More...

static uint32_t	sysclk_get_pbc_hz (void)
	Return the current rate in Hz of the Peripheral Bus C clock. More...

static uint32_t	sysclk_get_peripheral_bus_hz (const volatile void *module)
	Retrieves the current rate in Hz of the Peripheral Bus clock attached to the specified peripheral. More...

Enabling and disabling synchronous clocks
static void	sysclk_enable_cpu_module (unsigned int index)
	Enable a module clock derived from the CPU clock. More...

static void	sysclk_disable_cpu_module (unsigned int index)
	Disable a module clock derived from the CPU clock. More...

static void	sysclk_enable_hsb_module (unsigned int index)
	Enable a module clock derived from the HSB clock. More...

static void	sysclk_disable_hsb_module (unsigned int index)
	Disable a module clock derived from the HSB clock. More...

static void	sysclk_enable_pba_module (unsigned int index)
	Enable a module clock derived from the PBA clock. More...

static void	sysclk_disable_pba_module (unsigned int index)
	Disable a module clock derived from the PBA clock. More...

static void	sysclk_enable_pbb_module (unsigned int index)
	Enable a module clock derived from the PBB clock. More...

static void	sysclk_disable_pbb_module (unsigned int index)
	Disable a module clock derived from the PBB clock. More...

static void	sysclk_enable_pbc_module (unsigned int index)
	Enable a module clock derived from the PBC clock. More...

static void	sysclk_disable_pbc_module (unsigned int index)
	Disable a module clock derived from the PBC clock. More...

static void	sysclk_enable_peripheral_clock (const volatile void *module)
	Enable a peripheral's clock from its base address. More...

static void	sysclk_disable_peripheral_clock (const volatile void *module)
	Disable a peripheral's clock from its base address. More...

System Clock Source and Prescaler configuration
void	sysclk_set_prescalers (unsigned int cpu_shift, unsigned int pba_shift, unsigned int pbb_shift, unsigned int pbc_shift)
	Set system clock prescaler configuration. More...

void	sysclk_set_source (uint_fast8_t src)
	Change the source of the main system clock. More...

#define CONFIG_SYSCLK_CPU_DIV 0

Initial/static CPU/HSB/PBB clock divider (log2)

Configuration symbol for dividing the CPU clock frequency by \(2^{CONFIG\_SYSCLK\_CPU\_DIV}\).

The CPU, HSB and PBA clocks will run at

\[ f_{cpu} = \frac{f_{sys}}{2^\mathrm{CONFIG\_SYSCLK\_CPU\_DIV}}\,\mbox{Hz} \]

after initialization.

If this symbol is not defined, the CPU clock frequency is not divided.

This symbol may be defined in conf_clock.h.

Referenced by sysclk_get_cpu_hz(), and sysclk_get_hsb_hz().

#define CONFIG_SYSCLK_INIT_CPUMASK

Configuration symbol for the CPU clocks enabled at power-on after the sysclock module has been initialized.

By default, all CPU clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx settings.

If this symbol is not defined, then all CPU clocks are left enabled.

This symbol may be defined in conf_clock.h.

#define CONFIG_SYSCLK_INIT_HSBMASK

Configuration symbol for the HSB clocks enabled at power-on after the sysclock module has been initialized.

By default, all HSB clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx settings.

If this symbol is not defined, then all HSB clocks are left enabled.

This symbol may be defined in conf_clock.h.

#define CONFIG_SYSCLK_INIT_PBAMASK

Configuration symbol for the PBA clocks enabled at power-on after the sysclock module has been initialized.

By default, all PBA clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx settings.

If this symbol is not defined, then all PBA clocks are left enabled.

This symbol may be defined in conf_clock.h.

#define CONFIG_SYSCLK_INIT_PBBMASK

Configuration symbol for the PBB clocks enabled at power-on after the sysclock module has been initialized.

By default, all PBB clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx settings.

If this symbol is not defined, then all PBB clocks are left enabled.

This symbol may be defined in conf_clock.h.

#define CONFIG_SYSCLK_INIT_PBCMASK

Configuration symbol for the PBC clocks enabled at power-on after the sysclock module has been initialized.

By default, all PBC clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx settings.

If this symbol is not defined, then all PBC clocks are left enabled.

This symbol may be defined in conf_clock.h.

#define CONFIG_SYSCLK_PBA_DIV 0

Initial/static PBA clock divider (log2)

Configuration symbol for dividing the PBA clock frequency by \(2^{CONFIG\_SYSCLK\_PBA\_DIV}\).

The PBA clock will run at

\[ f_{PBA} = \frac{f_{sys}}{2^\mathrm{CONFIG\_SYSCLK\_PBA\_DIV}}\,\mbox{Hz} \]

after initialization.

If this symbol is not defined, the PBA clock frequency is not divided.

This symbol may be defined in conf_clock.h.

Referenced by sysclk_get_pba_hz().

#define CONFIG_SYSCLK_PBB_DIV 0

Initial/static PBB clock divider (log2)

Configuration symbol for dividing the PBB clock frequency by \(2^{CONFIG\_SYSCLK\_PBB\_DIV}\).

The PBB clock will run at

\[ f_{PBB} = \frac{f_{sys}}{2^\mathrm{CONFIG\_SYSCLK\_PBB\_DIV}}\,\mbox{Hz} \]

after initialization.

If this symbol is not defined, the PBB clock frequency is not divided.

This symbol may be defined in conf_clock.h.

Referenced by sysclk_get_pbb_hz().

#define CONFIG_SYSCLK_PBC_DIV 0

Initial/static PBC clock divider (log2)

Configuration symbol for dividing the PBC clock frequency by \(2^{CONFIG\_SYSCLK\_PBC\_DIV}\).

The PBC clock will run at

\[ f_{PBC} = \frac{f_{sys}}{2^\mathrm{CONFIG\_SYSCLK\_PBC\_DIV}}\,\mbox{Hz} \]

after initialization.

If this symbol is not defined, the PBC clock frequency is not divided.

This symbol may be defined in conf_clock.h.

Referenced by sysclk_get_pbc_hz().

#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS

Initial/static main system clock source.

The main system clock will be configured to use this clock during initialization.

Referenced by sysclk_get_main_hz().

#define CONFIG_USBCLK_DIV

Configuration symbol for the USB generic clock divider setting.

Sets the clock division for the USB generic clock. If a USB clock source is selected with CONFIG_USBCLK_SOURCE, this configuration symbol must also be defined.

Define this as any value that does not exceed GENCLK_DIV_MAX, and which will give a 48 MHz clock frequency from the selected source.

#define CONFIG_USBCLK_SOURCE

Configuration symbol for the USB generic clock source.

Sets the clock source to use for the USB. The source must also be properly configured.

Define this to one of the USBCLK_SRC_xxx settings. Leave it undefined if USB is not required.

#define SYSCLK_ACIFA0 (AVR32_ACIFA0_CLK_PBA % 32)

Analog Comparator 0.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_ACIFA1 (AVR32_ACIFA1_CLK_PBA % 32)

Analog Comparator 1.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_ADCIFA (AVR32_ADCIFA_CLK_PBC % 32)

A/D Converter.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_AST (AVR32_AST_CLK_PBA % 32)

Asynchronous Timer.

Referenced by ast_init(), main(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_AW (AVR32_AW_CLK_PBA % 32)

aWire UART

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_CANIF_DATA (AVR32_CANIF_CLK_HSB % 32)

CANIF DMA interface.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_CANIF_REGS (AVR32_CANIF_CLK_PBC % 32)

CANIF registers.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_DACIFB0 (AVR32_DACIFB0_CLK_PBA % 32)

D/A Converter 0.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_DACIFB1 (AVR32_DACIFB1_CLK_PBA % 32)

D/A Converter 1.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_EBI (AVR32_EBI_CLK_HSB % 32)

External Bus Interface.

#define SYSCLK_EIC (AVR32_EIC_CLK_PBA % 32)

External Interrupt Controller.

Referenced by main(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_FLASHC_DATA (AVR32_FLASHC_CLK_HSB % 32)

Flash data interface.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_FLASHC_REGS (AVR32_FLASHC_CLK_PBB % 32)

Flash Controller registers.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_FREQM (AVR32_FREQM_CLK_PBA % 32)

Frequency Meter.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_GPIO (AVR32_GPIO_CLK_PBA % 32)

General-Purpose I/O.

Referenced by arch_ioport_init(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_HMATRIX (AVR32_HMATRIX_CLK_PBB % 32)

HSB Matrix configuration.

Referenced by memories_initialization(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_HSB_RAM (AVR32_RAM_CLK_HSB % 32)

HSB RAM.

#define SYSCLK_IISC (AVR32_IISC_CLK_PBA % 32)

Inter-IC Sound (I2S) Controller.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_INTC (AVR32_INTC_CLK_PBA % 32)

Internal interrupt controller.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_MACB_REGS (AVR32_MACB_CLK_PBB % 32)

Ethernet MAC registers.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_MDMA_HSB (AVR32_MDMA_CLK_HSB % 32)

MDMA memory interface.

#define SYSCLK_MDMA_REGS (AVR32_MDMA_CLK_PBC % 32)

MDMA registers.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_OCD AVR32_OCD_CLK_CPU

On-Chip Debug system.

Referenced by reset_do_soft_reset().

#define SYSCLK_PBA_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32)

HSB<->PBA bridge.

#define SYSCLK_PBB_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32)

HSB<->PBB bridge.

#define SYSCLK_PBC_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBC_BRIDGE % 32)

HSB<->PBC bridge.

#define SYSCLK_PDCA_HSB (AVR32_PDCA_CLK_HSB % 32)

PDCA memory interface.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_PDCA_PB (AVR32_PDCA_CLK_PBC % 32)

PDCA peripheral bus interface.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_PEVC_HSB (AVR32_PEVC_CLK_HSB % 32)

Peripheral Event Controller.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_PEVC_REGS (AVR32_PEVC_CLK_PBA % 32)

Peripheral Event Controller.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_PM (AVR32_PM_CLK_PBA % 32)

PM/RTC/EIM configuration.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_PWM (AVR32_PWM_CLK_PBA % 32)

Pulse Width Modulator.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_QDEC0 (AVR32_QDEC0_CLK_PBA % 32)

Quadrature Decoder 0.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_QDEC1 (AVR32_QDEC1_CLK_PBA % 32)

Quadrature Decoder 1.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SAU_HSB (AVR32_SAU_CLK_HSB % 32)

Secure Access Unit HSB interface.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SAU_REGS (AVR32_SAU_CLK_PBB % 32)

Secure Access Unit register.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SCIF (AVR32_SCIF_CLK_PBA % 32)

System Control Interface.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SDRAMC_REGS (AVR32_SDRAMC_CLK_PBB % 32)

SDRAM Controller registers.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SMC_REGS (AVR32_SMC_CLK_PBB % 32)

Static Memory Controller registers.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SPI0 (AVR32_SPI0_CLK_PBC % 32)

SPI Controller 0.

Referenced by spi_master_init(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SPI1 (AVR32_SPI1_CLK_PBA % 32)

SPI Controller 1.

Referenced by spi_master_init(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SRC_OSC0 1

Oscillator 0.

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_OSC1 2

Oscillator 1.

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_PLL0 3

Phase Locked Loop 0.

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_PLL1 4

Phase Locked Loop 1.

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_RC120M 7

120 MHz RC oscillator

Referenced by sysclk_get_main_hz(), sysclk_init(), and sysclk_set_source().

#define SYSCLK_SRC_RC8M 5

8 MHz RC oscillator

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_RCSYS 0

System RC oscillator.

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SYSTIMER AVR32_CORE_CLK_CPU_COUNT

COUNT/COMPARE system registers.

#define SYSCLK_TC0 (AVR32_TC0_CLK_PBC % 32)

Timer/Counter 0.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_TC1 (AVR32_TC1_CLK_PBA % 32)

Timer/Counter 1.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_TWIM0 (AVR32_TWIM0_CLK_PBA % 32)

TWI Master 0.

Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), and twi_master_setup().

#define SYSCLK_TWIM1 (AVR32_TWIM1_CLK_PBA % 32)

TWI Master 1.

Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), and twi_master_setup().

#define SYSCLK_TWIM2 (AVR32_TWIM2_CLK_PBC % 32)

TWI Master 2.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_TWIS0 (AVR32_TWIS0_CLK_PBA % 32)

TWI Slave 0.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_TWIS1 (AVR32_TWIS1_CLK_PBA % 32)

TWI Slave 1.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_TWIS2 (AVR32_TWIS2_CLK_PBC % 32)

TWI Slave 2.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_USART0 (AVR32_USART0_CLK_PBA % 32)

USART 0.

Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), and usart_spi_init().

#define SYSCLK_USART1 (AVR32_USART1_CLK_PBC % 32)

USART 1.

Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), and usart_spi_init().

#define SYSCLK_USART2 (AVR32_USART2_CLK_PBA % 32)

USART 2.

Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), and usart_spi_init().

#define SYSCLK_USART3 (AVR32_USART3_CLK_PBA % 32)

USART 3.

Referenced by usart_spi_init().

#define SYSCLK_USART4 (AVR32_USART4_CLK_PBC % 32)

USART 4.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_USBC_DATA (AVR32_USBC_CLK_HSB % 32)

USBC DMA and FIFO interface.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_USBC_REGS (AVR32_USBC_CLK_PBB % 32)

USBB registers.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_WDT (AVR32_WDT_CLK_PBA % 32)

Watchdog Timer.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define USBCLK_SRC_OSC0 GENCLK_SRC_OSC0

Use OSC0.

#define USBCLK_SRC_OSC1 GENCLK_SRC_OSC1

Use OSC1.

#define USBCLK_SRC_PLL0 GENCLK_SRC_PLL0

Use PLL0.

#define USBCLK_SRC_PLL1 GENCLK_SRC_PLL1

Use PLL1.

#define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/AVR32_SCIF_RCOSC_FREQUENCY))

Number of us to wait for USB clock to start.

static void sysclk_disable_cpu_module ( unsigned int index )

inlinestatic

Disable a module clock derived from the CPU clock.

Parameters

index Index of the module clock in the CPUMASK register

References sysclk_priv_disable_module().

static void sysclk_disable_hsb_module ( unsigned int index )

inlinestatic

Disable a module clock derived from the HSB clock.

Parameters

index Index of the module clock in the HSBMASK register

References sysclk_priv_disable_module().

Referenced by sysclk_disable_peripheral_clock().

static void sysclk_disable_pba_module ( unsigned int index )

inlinestatic

Disable a module clock derived from the PBA clock.

Parameters

index Index of the module clock in the PBAMASK register

References sysclk_priv_disable_module().

Referenced by sysclk_disable_peripheral_clock().

static void sysclk_disable_pbb_module ( unsigned int index )

inlinestatic

Disable a module clock derived from the PBB clock.

Parameters

index Index of the module clock in the PBBMASK register

References sysclk_priv_disable_module().

Referenced by nvram_write(), and sysclk_disable_peripheral_clock().

static void sysclk_disable_pbc_module ( unsigned int index )

inlinestatic

Disable a module clock derived from the PBC clock.

Parameters

index Index of the module clock in the PBCMASK register

References sysclk_priv_disable_module().

Referenced by sysclk_disable_peripheral_clock().

static void sysclk_disable_peripheral_clock ( const volatile void * module )

inlinestatic

Disable a peripheral's clock from its base address.

Disables the clock to a peripheral, given its base address. If the peripheral has an associated clock on the HSB bus, this will be disabled also.

Parameters

module Pointer to the module's base address.

References Assert, SYSCLK_ACIFA0, SYSCLK_ACIFA1, SYSCLK_ADCIFA, SYSCLK_AST, SYSCLK_AW, SYSCLK_CANIF_DATA, SYSCLK_CANIF_REGS, SYSCLK_DACIFB0, SYSCLK_DACIFB1, sysclk_disable_hsb_module(), sysclk_disable_pba_module(), sysclk_disable_pbb_module(), sysclk_disable_pbc_module(), SYSCLK_EIC, SYSCLK_FLASHC_DATA, SYSCLK_FLASHC_REGS, SYSCLK_FREQM, SYSCLK_GPIO, SYSCLK_HMATRIX, SYSCLK_IISC, SYSCLK_INTC, SYSCLK_MACB_REGS, SYSCLK_MDMA_REGS, SYSCLK_PDCA_HSB, SYSCLK_PDCA_PB, SYSCLK_PEVC_HSB, SYSCLK_PEVC_REGS, SYSCLK_PM, SYSCLK_PWM, SYSCLK_QDEC0, SYSCLK_QDEC1, SYSCLK_SAU_HSB, SYSCLK_SAU_REGS, SYSCLK_SCIF, SYSCLK_SDRAMC_REGS, SYSCLK_SMC_REGS, SYSCLK_SPI0, SYSCLK_SPI1, SYSCLK_TC0, SYSCLK_TC1, SYSCLK_TWIM0, SYSCLK_TWIM1, SYSCLK_TWIM2, SYSCLK_TWIS0, SYSCLK_TWIS1, SYSCLK_TWIS2, SYSCLK_USART0, SYSCLK_USART1, SYSCLK_USART2, SYSCLK_USART4, SYSCLK_USBC_DATA, SYSCLK_USBC_REGS, and SYSCLK_WDT.

Referenced by freqm_disable().

void sysclk_disable_usb ( void )

Disable the USB generic clock.

References genclk_disable().

Referenced by otg_dual_disable(), and udd_disable().

static void sysclk_enable_cpu_module ( unsigned int index )

inlinestatic

Enable a module clock derived from the CPU clock.

Parameters

index Index of the module clock in the CPUMASK register

References sysclk_priv_enable_module().

Referenced by reset_do_soft_reset().

static void sysclk_enable_hsb_module ( unsigned int index )

inlinestatic

Enable a module clock derived from the HSB clock.

Parameters

index Index of the module clock in the HSBMASK register

References sysclk_priv_enable_module().

Referenced by sysclk_enable_peripheral_clock().

static void sysclk_enable_pba_module ( unsigned int index )

inlinestatic

Enable a module clock derived from the PBA clock.

Parameters

index Index of the module clock in the PBAMASK register

References sysclk_priv_enable_module().

Referenced by arch_ioport_init(), ast_init(), main(), spi_master_init(), sysclk_enable_peripheral_clock(), twi_master_setup(), uart_open(), and usart_spi_init().

static void sysclk_enable_pbb_module ( unsigned int index )

inlinestatic

Enable a module clock derived from the PBB clock.

Parameters

index Index of the module clock in the PBBMASK register

References sysclk_priv_enable_module().

Referenced by memories_initialization(), nvram_write(), and sysclk_enable_peripheral_clock().

static void sysclk_enable_pbc_module ( unsigned int index )

inlinestatic

Enable a module clock derived from the PBC clock.

Parameters

index Index of the module clock in the PBCMASK register

References sysclk_priv_enable_module().

Referenced by spi_master_init(), sysclk_enable_peripheral_clock(), and usart_spi_init().

static void sysclk_enable_peripheral_clock ( const volatile void * module )

inlinestatic

Enable a peripheral's clock from its base address.

Enables the clock to a peripheral, given its base address. If the peripheral has an associated clock on the HSB bus, this will be enabled also.

Parameters

module Pointer to the module's base address.

References Assert, SYSCLK_ACIFA0, SYSCLK_ACIFA1, SYSCLK_ADCIFA, SYSCLK_AST, SYSCLK_AW, SYSCLK_CANIF_DATA, SYSCLK_CANIF_REGS, SYSCLK_DACIFB0, SYSCLK_DACIFB1, SYSCLK_EIC, sysclk_enable_hsb_module(), sysclk_enable_pba_module(), sysclk_enable_pbb_module(), sysclk_enable_pbc_module(), SYSCLK_FLASHC_DATA, SYSCLK_FLASHC_REGS, SYSCLK_FREQM, SYSCLK_GPIO, SYSCLK_HMATRIX, SYSCLK_IISC, SYSCLK_INTC, SYSCLK_MACB_REGS, SYSCLK_MDMA_REGS, SYSCLK_PDCA_HSB, SYSCLK_PDCA_PB, SYSCLK_PEVC_HSB, SYSCLK_PEVC_REGS, SYSCLK_PM, SYSCLK_PWM, SYSCLK_QDEC0, SYSCLK_QDEC1, SYSCLK_SAU_HSB, SYSCLK_SAU_REGS, SYSCLK_SCIF, SYSCLK_SDRAMC_REGS, SYSCLK_SMC_REGS, SYSCLK_SPI0, SYSCLK_SPI1, SYSCLK_TC0, SYSCLK_TC1, SYSCLK_TWIM0, SYSCLK_TWIM1, SYSCLK_TWIM2, SYSCLK_TWIS0, SYSCLK_TWIS1, SYSCLK_TWIS2, SYSCLK_USART0, SYSCLK_USART1, SYSCLK_USART2, SYSCLK_USART4, SYSCLK_USBC_DATA, SYSCLK_USBC_REGS, and SYSCLK_WDT.

Referenced by freqm_enable(), ili9341_interface_init(), main(), and usart_serial_init().

void sysclk_enable_usb ( void )

Enable the USB generic clock.

Precondition: The USB generic clock must be configured to 48MHz. CONFIG_USBCLK_SOURCE and CONFIG_USBCLK_DIV must be defined with proper configuration. The selected clock source must also be configured.

References CONFIG_USBCLK_DIV, CONFIG_USBCLK_SOURCE, and genclk_enable_config().

Referenced by otg_dual_enable(), and udd_enable().

static uint32_t sysclk_get_cpu_hz ( void )

inlinestatic

Return the current rate in Hz of the CPU clock.

Todo:: This function assumes that the CPU always runs at the system clock frequency. We want to support at least two more scenarios: Fixed CPU/bus clock dividers (config symbols) and dynamic CPU/bus clock dividers (which may change at run time). Ditto for all the bus clocks.

Returns: Frequency of the CPU clock, in Hz.

References CONFIG_SYSCLK_CPU_DIV, and sysclk_get_main_hz().

Referenced by controller_task_init(), gfx_et024006dhu_init(), main(), run_sync_clock_test(), sensor_timestamp(), sysclk_init(), time_tick_calc_delay(), and usart_spi_setup_device().

static uint32_t sysclk_get_hsb_hz ( void )

inlinestatic

Return the current rate in Hz of the High-Speed Bus clock.

Returns: Frequency of the High Speed Peripheral Bus clock, in Hz.

References CONFIG_SYSCLK_CPU_DIV, and sysclk_get_main_hz().

static uint32_t sysclk_get_main_hz ( void )

inlinestatic

Return the current rate in Hz of the main system clock.

Todo:: This function assumes that the main clock source never changes once it's been set up, and that PLL0 always runs at the compile-time configured default rate. While this is probably the most common configuration, which we want to support as a special case for performance reasons, we will at some point need to support more dynamic setups as well.

References CONFIG_SYSCLK_SOURCE, OSC_RC120M_NOMINAL_HZ, OSC_RC8M_NOMINAL_HZ, OSC_RCSYS_NOMINAL_HZ, pll_get_default_rate, SYSCLK_SRC_OSC0, SYSCLK_SRC_OSC1, SYSCLK_SRC_PLL0, SYSCLK_SRC_PLL1, SYSCLK_SRC_RC120M, SYSCLK_SRC_RC8M, and SYSCLK_SRC_RCSYS.

Referenced by gui_change_update_fs(), gui_task(), gui_task_init(), sysclk_get_cpu_hz(), sysclk_get_hsb_hz(), sysclk_get_pba_hz(), sysclk_get_pbb_hz(), and sysclk_get_pbc_hz().

static uint32_t sysclk_get_pba_hz ( void )

inlinestatic

Return the current rate in Hz of the Peripheral Bus A clock.

Returns: Frequency of the Peripheral Bus A clock, in Hz.

References CONFIG_SYSCLK_PBA_DIV, and sysclk_get_main_hz().

Referenced by controller_task_init(), controller_twi_init(), dac_task_init(), init_timer_isr(), main(), remote_task_init(), run_sync_clock_test(), sysclk_get_peripheral_bus_hz(), tc_init(), twi_master_setup(), uart_config(), and uart_open().

static uint32_t sysclk_get_pbb_hz ( void )

inlinestatic

Return the current rate in Hz of the Peripheral Bus B clock.

Returns: Frequency of the Peripheral Bus B clock, in Hz.

References CONFIG_SYSCLK_PBB_DIV, and sysclk_get_main_hz().

Referenced by gfx_et024006dhu_init(), run_sync_clock_test(), and sysclk_get_peripheral_bus_hz().

static uint32_t sysclk_get_pbc_hz ( void )

inlinestatic

Return the current rate in Hz of the Peripheral Bus C clock.

Returns: Frequency of the Peripheral Bus C clock, in Hz.

References CONFIG_SYSCLK_PBC_DIV, and sysclk_get_main_hz().

Referenced by adc_task_init(), run_sync_clock_test(), and sysclk_get_peripheral_bus_hz().

static uint32_t sysclk_get_peripheral_bus_hz ( const volatile void * module )

inlinestatic

Retrieves the current rate in Hz of the Peripheral Bus clock attached to the specified peripheral.

Parameters

module Pointer to the module's base address.

Returns: Frequency of the bus attached to the specified peripheral, in Hz.

References Assert, sysclk_get_pba_hz(), sysclk_get_pbb_hz(), and sysclk_get_pbc_hz().

Referenced by main(), spi_master_setup_device(), and usart_serial_init().

void sysclk_init ( void )

Initialize the synchronous clock system.

This function will initialize the system clock and its source. This includes:

Mask all synchronous clocks except for any clocks which are essential for normal operation (for example internal memory clocks).
Set up the system clock prescalers as specified by the application's configuration file.
Enable the clock source specified by the application's configuration file (oscillator or PLL) and wait for it to become stable.
Set the main system clock source to the clock specified by the application's configuration file.

Since all non-essential peripheral clocks are initially disabled, it is the responsibility of the peripheral driver to re-enable any clocks that are needed for normal operation.

References Assert, CONFIG_SYSCLK_CPU_DIV, CONFIG_SYSCLK_INIT_CPUMASK, CONFIG_SYSCLK_INIT_HSBMASK, CONFIG_SYSCLK_INIT_PBAMASK, CONFIG_SYSCLK_INIT_PBBMASK, CONFIG_SYSCLK_INIT_PBCMASK, CONFIG_SYSCLK_PBA_DIV, CONFIG_SYSCLK_PBB_DIV, CONFIG_SYSCLK_PBC_DIV, CONFIG_SYSCLK_SOURCE, flash_set_bus_freq, osc_enable(), OSC_ID_OSC0, OSC_ID_OSC1, OSC_ID_RC120M, OSC_ID_RC8M, osc_wait_ready(), pll_enable_config_defaults(), sysclk_get_cpu_hz(), SYSCLK_INIT_MINIMAL_CPUMASK, SYSCLK_INIT_MINIMAL_HSBMASK, SYSCLK_INIT_MINIMAL_PBAMASK, SYSCLK_INIT_MINIMAL_PBBMASK, SYSCLK_INIT_MINIMAL_PBCMASK, sysclk_set_prescalers(), sysclk_set_source(), SYSCLK_SRC_OSC0, SYSCLK_SRC_OSC1, SYSCLK_SRC_PLL0, SYSCLK_SRC_PLL1, SYSCLK_SRC_RC120M, SYSCLK_SRC_RC8M, and SYSCLK_SRC_RCSYS.

Referenced by main(), run_sync_clock_test(), and sensor_platform_init().

void sysclk_priv_disable_module	(	unsigned int	bus_id,
		unsigned int	module_index
	)

Disable a maskable module clock.

Parameters

bus_id	Bus index, given by the `AVR32_PM_CLK_GRP_xxx` definitions.
module_index	Index of the module to be disabled. This is the bit number in the corresponding xxxMASK register.

References cpu_irq_restore(), and cpu_irq_save().

Referenced by sysclk_disable_cpu_module(), sysclk_disable_hsb_module(), sysclk_disable_pba_module(), sysclk_disable_pbb_module(), and sysclk_disable_pbc_module().

void sysclk_priv_enable_module	(	unsigned int	bus_id,
		unsigned int	module_index
	)

Enable a maskable module clock.

Parameters

bus_id	Bus index, given by the `AVR32_PM_CLK_GRP_xxx` definitions.
module_index	Index of the module to be enabled. This is the bit number in the corresponding xxxMASK register.

References cpu_irq_restore(), and cpu_irq_save().

Referenced by sysclk_enable_cpu_module(), sysclk_enable_hsb_module(), sysclk_enable_pba_module(), sysclk_enable_pbb_module(), and sysclk_enable_pbc_module().

void sysclk_set_prescalers	(	unsigned int	cpu_shift,
		unsigned int	pba_shift,
		unsigned int	pbb_shift,
		unsigned int	pbc_shift
	)

Set system clock prescaler configuration.

This function will change the system clock prescaler configuration to match the parameters.

Note: The parameters to this function are device-specific.

Parameters

cpu_shift	The CPU clock will be divided by \(2^{cpu\_shift}\)
pba_shift	The PBA clock will be divided by \(2^{pba\_shift}\)
pbb_shift	The PBB clock will be divided by \(2^{pbb\_shift}\)
pbc_shift	The PBC clock will be divided by \(2^{pbc\_shift}\)

References Assert, AVR32_PM_PBASEL_PBSEL, AVR32_PM_PBBSEL_PBSEL, AVR32_PM_PBCSEL_PBSEL, cpu_irq_restore(), and cpu_irq_save().

Referenced by main(), and sysclk_init().

void sysclk_set_source ( uint_fast8_t src )

Change the source of the main system clock.

Parameters

src	The new system clock source. Must be one of the constants from the System Clock Sources section.

References Assert, cpu_irq_restore(), cpu_irq_save(), and SYSCLK_SRC_RC120M.

Referenced by main(), and sysclk_init().

Microchip® Advanced Software Framework

Platform Dependencies

Modules

Macros

Functions

System Clock Initialization

Configuration Symbols

System clock source

USB Clock Sources

Clocks derived from the CPU clock

Clocks derived from the HSB clock

Clocks derived from the PBA clock

Clocks derived from the PBB clock

Clocks derived from the PBC clock

Querying the system clock and its derived clocks

Enabling and disabling synchronous clocks

System Clock Source and Prescaler configuration