scif_uc3l.h File Reference

#include "compiler.h"

Data Structures
struct	scif_dfll_closedloop_conf_t
	DFLL closed-loop mode settings. More...
struct	scif_dfll_openloop_conf_t
	DFLL open-loop mode settings. More...
struct	scif_dfll_ssg_conf_t
	DFLL SSG settings. More...
struct	scif_gclk_opt_t
	Generic clock generation settings. More...
struct	scif_osc32_opt_t
	OSC32 startup options. More...
struct	scif_osc_opt_t
	OSC0/OSC1 startup options. More...

Macros
#define	AVR32_SCIF_OSCCTRL0_OSCEN_DISABLE   0x00000000
#define	AVR32_SCIF_OSCCTRL0_OSCEN_ENABLE   0x00000001
#define	AVR32_SCIF_OSCCTRL32_OSC32EN_DISABLE   0x00000000
#define	AVR32_SCIF_OSCCTRL32_OSC32EN_ENABLE   0x00000001
#define	SCIF_DFLL_MAXFREQ_HZ   150000000UL
#define	SCIF_DFLL_MAXFREQ_KHZ   150000
	The max DFLL output frequency. More...
#define	SCIF_DFLL_MINFREQ_HZ   40000000UL
#define	SCIF_DFLL_MINFREQ_KHZ   40000
	The min DFLL output frequency. More...
#define	SCIF_EXT_CRYSTAL_MAX_FREQ_HZ   20000000UL
#define	SCIF_EXT_CRYSTAL_MIN_FREQ_HZ   4000000UL
	Device-specific data. More...
#define	SCIF_NOT_SUPPORTED   (-10000)
	Define "not supported" for the chosen implementation. More...
#define	SCIF_OSC32_FREQ_HZ   32768
	The OSC32 frequency. More...
#define	SCIF_POLL_TIMEOUT   100000
	The timeguard used for polling in ticks. More...
#define	SCIF_RC120M_FREQ_HZ   120000000UL
	The RC120M frequency. More...
#define	SCIF_RC120M_FREQ_KHZ   120000
#define	SCIF_RC32K_FREQ_HZ   32768
	The RC32K slow clock frequency. More...
#define	SCIF_RC32K_FREQ_KHZ   (SCIF_RC32K_FREQ_HZ/1000)
#define	SCIF_SLOWCLOCK_FREQ_HZ   AVR32_SCIF_RCOSC_FREQUENCY
	The RCSYS slow clock frequency. More...
#define	SCIF_SLOWCLOCK_FREQ_KHZ   (SCIF_SLOWCLOCK_FREQ_HZ/1000)
#define	SCIF_UNLOCK(reg)   (AVR32_SCIF.unlock = (AVR32_SCIF_UNLOCK_KEY_VALUE << AVR32_SCIF_UNLOCK_KEY_OFFSET)|(reg))
	Unlock SCIF register macro. More...

Enumerations
enum	scif_gcctrl_oscsel_t {   SCIF_GCCTRL_SLOWCLOCK = AVR32_SCIF_GCCTRL_OSCSEL_RCSYS,   SCIF_GCCTRL_OSC32K = AVR32_SCIF_GCCTRL_OSCSEL_OSC32K,   SCIF_GCCTRL_DFLL0 = AVR32_SCIF_GCCTRL_OSCSEL_DFLL0,   SCIF_GCCTRL_OSC0 = AVR32_SCIF_GCCTRL_OSCSEL_OSC0,   SCIF_GCCTRL_RC120M = AVR32_SCIF_GCCTRL_OSCSEL_RC120M,   SCIF_GCCTRL_CPUCLOCK = AVR32_SCIF_GCCTRL_OSCSEL_CLK_CPU,   SCIF_GCCTRL_HSBCLOCK = AVR32_SCIF_GCCTRL_OSCSEL_CLK_HSB,   SCIF_GCCTRL_PBACLOCK = AVR32_SCIF_GCCTRL_OSCSEL_CLK_PBA,   SCIF_GCCTRL_PBBCLOCK = AVR32_SCIF_GCCTRL_OSCSEL_CLK_PBB,   SCIF_GCCTRL_RC32K = AVR32_SCIF_GCCTRL_OSCSEL_RC32K,   SCIF_GCCTRL_CLK1K = AVR32_SCIF_GCCTRL_OSCSEL_CLK_1K,   SCIF_GCCTRL_OSCSEL_INVALID }
	The different clock source for the generic clocks. More...
enum	scif_osc_mode_t {   SCIF_OSC_MODE_EXT_CLK = 0,   SCIF_OSC_MODE_2PIN_CRYSTAL = 1,   SCIF_OSC_MODE_NOT_SUPPORTED_1 = 2,   SCIF_OSC_MODE_NOT_SUPPORTED_2 = 3,   SCIF_OSC_MODE_2PIN_CRYSTAL_HICUR = 4,   SCIF_OSC_MODE_NOT_SUPPORTED_3 = 5,   SCIF_OSC_MODE_NOT_SUPPORTED_4 = 6,   SCIF_OSC_MODE_NOT_SUPPORTED_5 = 7 }
	The different oscillator modes. More...
enum	scif_osc_t {   SCIF_OSC0 = 0,   SCIF_OSC1 = 1 }
	The different oscillators. More...

Functions
Interrupt Functions
static __always_inline void	scif_enable_interrupts (unsigned long mask)
	Enable SCIF interrupts. More...
static __always_inline void	scif_disable_interrupts (unsigned long mask)
	Disable SCIF interrupts. More...
static __always_inline unsigned long	scif_get_enabled_interrupts (void)
	Read the SCIF currently enabled interrupts. More...
static __always_inline unsigned long	scif_get_interrupts_status (void)
	Read the interrupt status of the SCIF. More...
static __always_inline void	scif_clear_interrupts_status (unsigned long mask)
	Clear raised interrupts from the SCIF. More...
Power and Clocks Status Functions
static __always_inline unsigned long	scif_get_pclk_status (void)
	Read the Power and Clocks Status of the SCIF. More...
OSC0/OSC1 Functions
long int	scif_start_osc (scif_osc_t osc, const scif_osc_opt_t *opt, bool wait_for_ready)
	Configure and start an OSC0/OSC1 oscillator. More...
bool	scif_is_osc_ready (scif_osc_t osc)
	Is an oscillator stable and ready to be used as clock source? More...
long int	scif_stop_osc (scif_osc_t osc)
	Stop an oscillator. More...
long int	scif_configure_osc_crystalmode (scif_osc_t osc, unsigned int fcrystal)
	Configure an oscillator in crystal mode. More...
long int	scif_configure_osc_extmode (scif_osc_t osc)
	Configure an external clock as input clock. More...
long int	scif_enable_osc (scif_osc_t osc, unsigned int startup, bool wait_for_ready)
	Enable an oscillator with a given startup time. More...
OSC32 Functions
long int	scif_start_osc32 (const scif_osc32_opt_t *opt, bool wait_for_ready)
	Configure and start the OSC32 oscillator. More...
static __always_inline bool	scif_is_osc32_ready (void)
	Is OSC32 stable and ready to be used as clock source? More...
static __always_inline void	scif_osc32_1kout_ena (void)
	Enable the 1kHz output of the OSC32 oscillator. More...
static __always_inline void	scif_osc32_1kout_dis (void)
	Disable the 1kHz output of the OSC32 oscillator. More...
static __always_inline void	scif_osc32_32kout_ena (void)
	Enable the 32kHz output of the OSC32 oscillator. More...
static __always_inline void	scif_osc32_32kout_dis (void)
	Disable the 32kHz output of the OSC32 oscillator. More...
long int	scif_stop_osc32 (void)
	Stop the OSC32 oscillator. More...
120MHz RCosc Functions
void	scif_start_rc120M (void)
	Start the 120MHz internal RCosc (RC120M) clock. More...
void	scif_stop_rc120M (void)
	Stop the 120MHz internal RCosc (RC120M) clock. More...
32kHz internal RCosc (RC32K) Functions
void	scif_start_rc32k (void)
	Start the 32kHz internal RCosc (RC32K) clock. More...
void	scif_stop_rc32k (void)
	Stop the 32kHz internal RCosc (RC32K) clock. More...
void	scif_disable_rc32out (void)
	Un-force the RC32 signal from being output on the dedicated pin (PA20) More...
Generic Clock Functions
long int	scif_start_gclk (unsigned int gclk, const scif_gclk_opt_t *opt)
	Setup and start a generic clock. More...
long int	scif_stop_gclk (unsigned int gclk)
	Stop a generic clock. More...
long int	scif_gc_setup (unsigned int gclk, scif_gcctrl_oscsel_t clk_src, unsigned int diven, unsigned int divfactor)
	Setup a generic clock. More...
long int	scif_gc_enable (unsigned int gclk)
	Enable a generic clock. More...
Miscellaneous Functions
long int	scif_pclksr_statushigh_wait (unsigned long statusMask)
	Wait for a status high in the Power and Clocks status register. More...

DFLL Control Functions
#define	scif_dfll0_ssg_gc_enable(pgc_conf)   scif_start_gclk(AVR32_SCIF_GCLK_DFLLIF_SSG, pgc_conf)
	Configure and enable the SSG reference generic clock. More...
#define	scif_dfll0_closedloop_mainref_gc_enable(pgc_conf)   scif_start_gclk(AVR32_SCIF_GCLK_DFLLIF_REF, pgc_conf)
	Configure and enable the closed-loop mode main reference generic clock. More...
#define	scif_dfll0_closedloop_dither_gc_enable(pgc_conf)   scif_dfll0_ssg_gc_enable(pgc_conf)
	Configure and enable the generic clock used by the closed-loop mode dithering stage and by the SSG. More...
long int	scif_dfll0_openloop_start (const scif_dfll_openloop_conf_t *pdfllconfig)
	Configure and start the DFLL0 in open loop mode. More...
long int	scif_dfll0_openloop_start_auto (unsigned long TargetFreqkHz)
	Automatic configuration and start of the DFLL0 in open loop mode. More...
long int	scif_dfll0_openloop_updatefreq (const scif_dfll_openloop_conf_t *pdfllconfig)
	Update the frequency of the DFLL0 in open loop mode. More...
long int	scif_dfll0_openloop_updatefreq_auto (unsigned long TargetFreq)
	Automatic configuration to update the frequency of the DFLL0 in open loop mode. More...
long int	scif_dfll0_openloop_stop (void)
	Stop the DFLL0 in open loop mode. More...
long int	scif_dfll0_ssg_enable (scif_dfll_ssg_conf_t *pssg_conf)
	Configure and enable the SSG. More...
long int	scif_dfll0_closedloop_start (const scif_dfll_closedloop_conf_t *pdfllconfig)
	Configure and start the DFLL0 in closed loop mode. More...
long int	scif_dfll0_closedloop_configure_and_start (const scif_gclk_opt_t *gc_dfllif_ref_opt, unsigned long long target_freq_hz, bool enable_ssg)
	Depending on the target frequency, compute the DFLL configuration parameters and start the DFLL0 in closed loop mode. More...