Use case #2 - Event driven DMA transfer from a peripheral.

This use case shows how to set up a burst DMA transfer between a peripheral register set and the main system memory.

In this use case, the DMA is configured for:

• Burst length: 2 bytes (one 16-bit result from the ADC peripheral)
• Transfer count: 1024 (512 16-bit samples)
• Source: ADC channel 0 result register
• Destination: Buffer located in RAM
• Source address reload mode: End of burst
• Destination address reload mode: End of transaction
• Source and destination address direction mode: Increment

In this use case data is copied from the 16-bit ADC channel 0 result register to a buffer in RAM, each time the ADC indicates that a new conversion has completed.

Setup steps

Prerequisites

For the setup code of this use case to work, the following must be added to the project:

1. System Clock Manager Service (sysclk)

The ADC must be configured according to the XMEGA ADC driver Quick Start basic use case.

Example code

Add to application C-file:

#define DMA_CHANNEL     0
#define DMA_BUFFER_SIZE 1024

static uint16_t adc_samples[DMA_BUFFER_SIZE / 2];

static void dma_init(void)
{
    struct dma_channel_config dmach_conf;
    memset(&dmach_conf, 0, sizeof(dmach_conf));

    dma_channel_set_burst_length(&dmach_conf, DMA_CH_BURSTLEN_2BYTE_gc);
    dma_channel_set_transfer_count(&dmach_conf, DMA_BUFFER_SIZE);

    dma_channel_set_src_reload_mode(&dmach_conf,
          DMA_CH_SRCRELOAD_BURST_gc);
    dma_channel_set_dest_reload_mode(&dmach_conf,
          DMA_CH_DESTRELOAD_TRANSACTION_gc);

    dma_channel_set_src_dir_mode(&dmach_conf, DMA_CH_SRCDIR_INC_gc);
    dma_channel_set_dest_dir_mode(&dmach_conf, DMA_CH_DESTDIR_INC_gc);

    dma_channel_set_source_address(&dmach_conf,
          (uint16_t)(uintptr_t)&ADCA.CH0RES);
    dma_channel_set_destination_address(&dmach_conf,
          (uint16_t)(uintptr_t)adc_samples);

    dma_channel_set_trigger_source(&dmach_conf, DMA_CH_TRIGSRC_ADCA_CH0_gc);
    dma_channel_set_single_shot(&dmach_conf);

    dma_enable();

    dma_set_callback(DMA_CHANNEL, dma_transfer_done);
    dma_channel_set_interrupt_level(&dmach_conf, DMA_INT_LVL_LO);

    dma_channel_write_config(DMA_CHANNEL, &dmach_conf);
    dma_channel_enable(DMA_CHANNEL);
}

Add to main():

sysclk_init();
dma_init();

Workflow

1. Define the DMA channel that will be used for the transfer for convenience:

   • #define DMA_CHANNEL     0 

2. Define the array length that will be the used for the source and destination buffers located in RAM:

   • #define DMA_BUFFER_SIZE 1024 

3. Create a global array that will hold the ADC sample result data copied by the DMA controller channel when it is triggered (the buffer size is halved as each sample is two bytes long):

   • static uint16_t adc_samples[DMA_BUFFER_SIZE / 2]; 

4. Create a function dma_init() to intialize the DMA:

   • static void dma_init(void)
     {
         // ...
     }

5. Create config struct for DMA channel:

   • struct dma_channel_config       dmach_conf; 

6. Make sure the configuration structure is zeroed out to ensure that all values are reset to their defaults before writing new values:

   • memset(&dmach_conf, 0, sizeof(dmach_conf)); 

7. Configure the DMA channel for two byte bursts (the size of a single ADC conversion) with a transfer length equal to the size of the destination buffer:

   • dma_channel_set_burst_length(&dmach_conf, DMA_CH_BURSTLEN_2BYTE_gc);
     dma_channel_set_transfer_count(&dmach_conf, DMA_BUFFER_SIZE);

8. Configure the DMA channel to reset the source address at the end of each burst transfer, and the destination addresses at the end of the complete transaction (i.e. after DMA_BUFFER_SIZE bytes copied):

   • dma_channel_set_src_reload_mode(&dmach_conf, DMA_CH_SRCRELOAD_BURST_gc);
     dma_channel_set_dest_reload_mode(&dmach_conf, DMA_CH_DESTRELOAD_TRANSACTION_gc);

9. Configure the DMA channel to increment the source and destination addresses after each byte transferred:

   • dma_channel_set_src_dir_mode(&dmach_conf, DMA_CH_SRCDIR_INC_gc);
     dma_channel_set_dest_dir_mode(&dmach_conf, DMA_CH_DESTDIR_INC_gc);

10. Configure the DMA channel source and destination addresses to the ADC module channel 0 result registers and RAM buffer respectively:

    • dma_channel_set_source_address(&dmach_conf,
              (uint16_t)(uintptr_t)&ADCA.CH0RES);
      dma_channel_set_destination_address(&dmach_conf,
              (uint16_t)(uintptr_t)adc_samples);

11. Set the DMA channel trigger source to the ADC module channel 0 complete event:

    • dma_channel_set_trigger_source(&dmach_conf, DMA_CH_TRIGSRC_ADCA_CH0_gc); 

12. Configure the DMA channel in single shot mode, so that each time it is triggered it will perform one bust transfer only:

    • dma_channel_set_single_shot(&dmach_conf); 

13. Enable the DMA module so that channels can be configured in it:

    • dma_enable(); 

      Attention

      Calling dma_enable() will result in a soft-reset of the entire DMA module, clearing all channel configurations. If more than one DMA channel is to be configured, this function should be called only once in the application initialization procedure only.

14. Set up the DMA channel interrupt to run at low interrupt priority, and link it to the user created dma_transfer_done() function:

    • dma_set_callback(DMA_CHANNEL, dma_transfer_done);
      dma_channel_set_interrupt_level(&dmach_conf, DMA_INT_LVL_LO);

15. Write the DMA channel configuration to the DMA and enable it so that it can be triggered to start the transfer:

    • dma_channel_write_config(DMA_CHANNEL, &dmach_conf);
      dma_channel_enable(DMA_CHANNEL);

16. Initialize the clock system:

    • sysclk_init(); 

17. Call our DMA init function:

    • dma_init(); 

Usage steps

Example code

Add to, e.g., main loop in application C-file:

adc_start_conversion(&ADCA, ADC_CH0);
adc_wait_for_interrupt_flag(&ADCA, ADC_CH0);

Workflow

1. Start an ADC conversion, result will be automatically copied to the global buffer when complete:

   • adc_start_conversion(&ADCA, ADC_CH0); 

2. Wait for the ADC to complete before triggering the next conversion by polling the ADC channel 0 complete interrupt flag:

   • adc_wait_for_interrupt_flag(&ADCA, ADC_CH0);