See Quick Start Guide for the System Clock Management service (XMEGA).

The sysclk API covers the system clock and all clocks derived from it. The system clock is a chip-internal clock on which all synchronous clocks, i.e. CPU and bus/peripheral clocks, are based. The system clock is typically generated from one of a variety of sources, which may include crystal and RC oscillators as well as PLLs. The clocks derived from the system clock are sometimes also known as synchronous clocks, since they always run synchronously with respect to each other, as opposed to generic clocks which may run from different oscillators or PLLs.

Most applications should simply call sysclk_init() to initialize everything related to the system clock and its source (oscillator, PLL or DFLL), and leave it at that. More advanced applications, and platform-specific drivers, may require additional services from the clock system, some of which may be platform-specific.

Platform Dependencies

The sysclk API is partially chip- or platform-specific. While all platforms provide mostly the same functionality, there are some variations around how different bus types and clock tree structures are handled.

The following functions are available on all platforms with the same parameters and functionality. These functions may be called freely by portable applications, drivers and services:

The following functions are available on all platforms, but there may be variations in the function signature (i.e. parameters) and behavior. These functions are typically called by platform-specific parts of drivers, and applications that aren't intended to be portable:

All other functions should be considered platform-specific. Enabling/disabling clocks to specific peripherals as well as determining the speed of these clocks should be done by calling functions provided by the driver for that peripheral.

Configuration Symbols

The following configuration symbols may be used to specify the initial system clock configuration. If any of the symbols are not set, reasonable defaults will be provided.

CONFIG_SYSCLK_SOURCE: The initial system clock source.
CONFIG_SYSCLK_PSADIV: The initial Prescaler A setting.
CONFIG_SYSCLK_PSBCDIV: The initial Prescaler B setting.
CONFIG_USBCLK_SOURCE: The initial USB clock source.

System Clock Sources
#define	SYSCLK_SRC_RC2MHZ CLK_SCLKSEL_RC2M_gc
	Internal 2 MHz RC oscillator. More...

#define	SYSCLK_SRC_RC32MHZ CLK_SCLKSEL_RC32M_gc
	Internal 32 MHz RC oscillator. More...

#define	SYSCLK_SRC_RC32KHZ CLK_SCLKSEL_RC32K_gc
	Internal 32 KHz RC oscillator. More...

#define	SYSCLK_SRC_XOSC CLK_SCLKSEL_XOSC_gc
	External oscillator. More...

#define	SYSCLK_SRC_PLL CLK_SCLKSEL_PLL_gc
	Phase-Locked Loop. More...

Prescaler A Setting (relative to CLKsys)
#define	SYSCLK_PSADIV_1 CLK_PSADIV_1_gc
	Do not prescale. More...

#define	SYSCLK_PSADIV_2 CLK_PSADIV_2_gc
	Prescale CLKper4 by 2. More...

#define	SYSCLK_PSADIV_4 CLK_PSADIV_4_gc
	Prescale CLKper4 by 4. More...

#define	SYSCLK_PSADIV_8 CLK_PSADIV_8_gc
	Prescale CLKper4 by 8. More...

#define	SYSCLK_PSADIV_16 CLK_PSADIV_16_gc
	Prescale CLKper4 by 16. More...

#define	SYSCLK_PSADIV_32 CLK_PSADIV_32_gc
	Prescale CLKper4 by 32. More...

#define	SYSCLK_PSADIV_64 CLK_PSADIV_64_gc
	Prescale CLKper4 by 64. More...

#define	SYSCLK_PSADIV_128 CLK_PSADIV_128_gc
	Prescale CLKper4 by 128. More...

#define	SYSCLK_PSADIV_256 CLK_PSADIV_256_gc
	Prescale CLKper4 by 256. More...

#define	SYSCLK_PSADIV_512 CLK_PSADIV_512_gc
	Prescale CLKper4 by 512. More...

Prescaler B and C Setting (relative to CLKper4)
#define	SYSCLK_PSBCDIV_1_1 CLK_PSBCDIV_1_1_gc
	Do not prescale. More...

#define	SYSCLK_PSBCDIV_1_2 CLK_PSBCDIV_1_2_gc
	Prescale CLKper and CLKcpu by 2. More...

#define	SYSCLK_PSBCDIV_4_1 CLK_PSBCDIV_4_1_gc
	Prescale CLKper2, CLKper and CLKcpu by 4. More...

#define	SYSCLK_PSBCDIV_2_2 CLK_PSBCDIV_2_2_gc
	Prescale CLKper2 by 2, CLKper and CLKcpu by 4. More...

System Clock Port Numbers
enum	sysclk_port_id { SYSCLK_PORT_GEN, SYSCLK_PORT_A, SYSCLK_PORT_B, SYSCLK_PORT_C, SYSCLK_PORT_D, SYSCLK_PORT_E, SYSCLK_PORT_F }

Clocks not associated with any port
Note See the datasheet for available modules in the device.
#define	SYSCLK_DMA PR_DMA_bm
	DMA Controller. More...

#define	SYSCLK_EDMA PR_EDMA_bm
	EDMA Controller. More...

#define	SYSCLK_EVSYS PR_EVSYS_bm
	Event System. More...

#define	SYSCLK_RTC PR_RTC_bm
	Real-Time Counter. More...

#define	SYSCLK_EBI PR_EBI_bm
	Ext Bus Interface. More...

#define	SYSCLK_AES PR_AES_bm
	AES Module. More...

#define	SYSCLK_USB PR_USB_bm
	USB Module. More...

#define	SYSCLK_XCL PR_XCL_bm
	USB Module. More...

Clocks on PORTA and PORTB
Note See the datasheet for available modules in the device.
#define	SYSCLK_AC PR_AC_bm
	Analog Comparator. More...

#define	SYSCLK_ADC PR_ADC_bm
	A/D Converter. More...

#define	SYSCLK_DAC PR_DAC_bm
	D/A Converter. More...

Clocks on PORTC, PORTD, PORTE and PORTF
Note See the datasheet for available modules in the device.
#define	SYSCLK_TC0 PR_TC0_bm
	Timer/Counter 0. More...

#define	SYSCLK_TC1 PR_TC1_bm
	Timer/Counter 1. More...

#define	SYSCLK_TC4 PR_TC4_bm
	Timer/Counter 0. More...

#define	SYSCLK_TC5 PR_TC5_bm
	Timer/Counter 1. More...

#define	SYSCLK_HIRES PR_HIRES_bm
	Hi-Res Extension. More...

#define	SYSCLK_SPI PR_SPI_bm
	SPI controller. More...

#define	SYSCLK_USART0 PR_USART0_bm
	USART 0. More...

#define	SYSCLK_USART1 PR_USART1_bm
	USART 1. More...

#define	SYSCLK_TWI PR_TWI_bm
	TWI controller. More...

RTC clock source identifiers
#define	SYSCLK_RTCSRC_ULP CLK_RTCSRC_ULP_gc
	1kHz from internal ULP oscillator. More...

#define	SYSCLK_RTCSRC_TOSC CLK_RTCSRC_TOSC_gc
	1.024kHz from 32.768kHz crystal oscillator TOSC More...

#define	SYSCLK_RTCSRC_RCOSC CLK_RTCSRC_RCOSC_gc
	1.024kHz from 32.768kHz internal RC oscillator More...

#define	SYSCLK_RTCSRC_TOSC32 CLK_RTCSRC_TOSC32_gc
	32.768kHz from crystal oscillator TOSC More...

#define	SYSCLK_RTCSRC_RCOSC32 CLK_RTCSRC_RCOSC32_gc
	32.768kHz from internal RC oscillator More...

#define	SYSCLK_RTCSRC_EXTCLK CLK_RTCSRC_EXTCLK_gc
	External clock on TOSC1. More...

Querying the system clock and its derived clocks
static uint32_t	sysclk_get_main_hz (void)
	Return the current rate in Hz of the main system clock. More...

static uint32_t	sysclk_get_per4_hz (void)
	Return the current rate in Hz of clk_PER4. More...

static uint32_t	sysclk_get_per2_hz (void)
	Return the current rate in Hz of clk_PER2. More...

static uint32_t	sysclk_get_per_hz (void)
	Return the current rate in Hz of clk_PER. More...

static uint32_t	sysclk_get_cpu_hz (void)
	Return the current rate in Hz of the CPU clock. More...

static uint32_t	sysclk_get_peripheral_bus_hz (const volatile void *module)
	Retrieves the current rate in Hz of the Peripheral Bus clock attached to the specified peripheral. More...

Enabling and disabling synchronous clocks
void	sysclk_enable_module (enum sysclk_port_id port, uint8_t id)
	Enable the clock to peripheral id on port port. More...

void	sysclk_disable_module (enum sysclk_port_id port, uint8_t id)
	Disable the clock to peripheral id on port port. More...

static void	sysclk_enable_peripheral_clock (const volatile void *module)
	Enable a peripheral's clock from its base address. More...

static void	sysclk_disable_peripheral_clock (const volatile void *module)
	Disable a peripheral's clock from its base address. More...

static bool	sysclk_module_is_enabled (enum sysclk_port_id port, uint8_t id)
	Check if the synchronous clock is enabled for a module. More...

void	sysclk_enable_usb (uint8_t frequency)
	Enable clock for the USB module. More...

void	sysclk_disable_usb (void)
	Disable clock for the USB module. More...

#define	USBCLK_STARTUP_TIMEOUT 1

System Clock Source and Prescaler configuration
static void	sysclk_set_prescalers (uint8_t psadiv, uint8_t psbcdiv)
	Set system clock prescaler configuration. More...

static void	sysclk_set_source (uint8_t src)
	Change the source of the main system clock. More...

static void	sysclk_lock (void)
	Lock the system clock configuration. More...

RTC clock source control
static void	sysclk_rtcsrc_enable (uint8_t id)
	Enable RTC clock with specified clock source. More...

static void	sysclk_rtcsrc_disable (void)
	Disable RTC clock. More...

System Clock Initialization
void	sysclk_init (void)
	Initialize the synchronous clock system. More...

#define SYSCLK_AC PR_AC_bm

Analog Comparator.

Referenced by ac_disable(), ac_enable(), ac_write_config(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_ADC PR_ADC_bm

A/D Converter.

Referenced by adc_disable_clock(), adc_enable_clock(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_AES PR_AES_bm

AES Module.

Referenced by main(), sal_init(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_DAC PR_DAC_bm

D/A Converter.

Referenced by dac_disable_clock(), dac_enable_clock(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_DMA PR_DMA_bm

DMA Controller.

Referenced by dma_disable(), dma_enable(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_EBI PR_EBI_bm

Ext Bus Interface.

Referenced by ebi_cs_read_config(), ebi_cs_write_config(), ebi_disable_cs(), ebi_enable_cs(), ebi_sdram_read_config(), ebi_sdram_write_config(), ebi_setup_port(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_EDMA PR_EDMA_bm

EDMA Controller.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_EVSYS PR_EVSYS_bm

Event System.

Referenced by main(), qdec_enabled_evsys(), sound_init(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_HIRES PR_HIRES_bm

Hi-Res Extension.

Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), tc_disable(), tc_enable(), and tc_init().

#define SYSCLK_PSADIV_1 CLK_PSADIV_1_gc

Do not prescale.

Referenced by sysclk_init().

#define SYSCLK_PSADIV_128 CLK_PSADIV_128_gc

Prescale CLKper4 by 128.

Referenced by main().

#define SYSCLK_PSADIV_16 CLK_PSADIV_16_gc

Prescale CLKper4 by 16.

Referenced by main().

#define SYSCLK_PSADIV_2 CLK_PSADIV_2_gc

Prescale CLKper4 by 2.

#define SYSCLK_PSADIV_256 CLK_PSADIV_256_gc

Prescale CLKper4 by 256.

#define SYSCLK_PSADIV_32 CLK_PSADIV_32_gc

Prescale CLKper4 by 32.

#define SYSCLK_PSADIV_4 CLK_PSADIV_4_gc

Prescale CLKper4 by 4.

Referenced by main().

#define SYSCLK_PSADIV_512 CLK_PSADIV_512_gc

Prescale CLKper4 by 512.

Referenced by sysclk_get_per4_hz().

#define SYSCLK_PSADIV_64 CLK_PSADIV_64_gc

Prescale CLKper4 by 64.

#define SYSCLK_PSADIV_8 CLK_PSADIV_8_gc

Prescale CLKper4 by 8.

#define SYSCLK_PSBCDIV_1_1 CLK_PSBCDIV_1_1_gc

Do not prescale.

Referenced by main(), sysclk_get_per2_hz(), and sysclk_init().

#define SYSCLK_PSBCDIV_1_2 CLK_PSBCDIV_1_2_gc

Prescale CLKper and CLKcpu by 2.

Referenced by sysclk_get_per2_hz().

#define SYSCLK_PSBCDIV_2_2 CLK_PSBCDIV_2_2_gc

Prescale CLKper2 by 2, CLKper and CLKcpu by 4.

Referenced by main(), and sysclk_get_per2_hz().

#define SYSCLK_PSBCDIV_4_1 CLK_PSBCDIV_4_1_gc

Prescale CLKper2, CLKper and CLKcpu by 4.

Referenced by main(), and sysclk_get_per2_hz().

#define SYSCLK_RTC PR_RTC_bm

Real-Time Counter.

Referenced by main(), rtc_init(), rtc_vbat_system_check(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_RTCSRC_EXTCLK CLK_RTCSRC_EXTCLK_gc

External clock on TOSC1.

Referenced by sysclk_rtcsrc_enable().

#define SYSCLK_RTCSRC_RCOSC CLK_RTCSRC_RCOSC_gc

1.024kHz from 32.768kHz internal RC oscillator

Referenced by sysclk_rtcsrc_enable().

#define SYSCLK_RTCSRC_RCOSC32 CLK_RTCSRC_RCOSC32_gc

32.768kHz from internal RC oscillator

Referenced by sysclk_rtcsrc_enable().

#define SYSCLK_RTCSRC_TOSC CLK_RTCSRC_TOSC_gc

1.024kHz from 32.768kHz crystal oscillator TOSC

Referenced by sysclk_rtcsrc_enable().

#define SYSCLK_RTCSRC_TOSC32 CLK_RTCSRC_TOSC32_gc

32.768kHz from crystal oscillator TOSC

Referenced by sysclk_rtcsrc_enable().

#define SYSCLK_RTCSRC_ULP CLK_RTCSRC_ULP_gc

1kHz from internal ULP oscillator.

Low precision

#define SYSCLK_SPI PR_SPI_bm

SPI controller.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_SRC_PLL CLK_SCLKSEL_PLL_gc

Phase-Locked Loop.

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_RC2MHZ CLK_SCLKSEL_RC2M_gc

Internal 2 MHz RC oscillator.

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_RC32KHZ CLK_SCLKSEL_RC32K_gc

Internal 32 KHz RC oscillator.

Referenced by sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_RC32MHZ CLK_SCLKSEL_RC32M_gc

Internal 32 MHz RC oscillator.

Referenced by main(), sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_XOSC CLK_SCLKSEL_XOSC_gc

External oscillator.

Referenced by sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_TC0 PR_TC0_bm

Timer/Counter 0.

Referenced by main(), sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), tc_disable(), tc_enable(), and tc_init().

#define SYSCLK_TC1 PR_TC1_bm

Timer/Counter 1.

Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), tc_disable(), and tc_enable().

#define SYSCLK_TC4 PR_TC4_bm

Timer/Counter 0.

Referenced by main(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_TC5 PR_TC5_bm

Timer/Counter 1.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_TWI PR_TWI_bm

TWI controller.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_USART0 PR_USART0_bm

USART 0.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_USART1 PR_USART1_bm

USART 1.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define SYSCLK_USB PR_USB_bm

USB Module.

Referenced by sysclk_disable_usb(), and sysclk_enable_usb().

#define SYSCLK_XCL PR_XCL_bm

USB Module.

Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().

#define USBCLK_STARTUP_TIMEOUT 1

enum sysclk_port_id

Enumerator
SYSCLK_PORT_GEN	Devices not associated with a specific port.
SYSCLK_PORT_A	Devices on PORTA.
SYSCLK_PORT_B	Devices on PORTB.
SYSCLK_PORT_C	Devices on PORTC.
SYSCLK_PORT_D	Devices on PORTD.
SYSCLK_PORT_E	Devices on PORTE.
SYSCLK_PORT_F	Devices on PORTF.

void sysclk_disable_module	(	enum sysclk_port_id	port,
		uint8_t	id
	)

Disable the clock to peripheral id on port port.

Parameters

port	ID of the port to which the module is connected (one of the `SYSCLK_PORT_*` definitions).
id	The ID (bitmask) of the peripheral module to be disabled.

References cpu_irq_restore(), and cpu_irq_save().

Referenced by ac_disable(), ac_write_config(), adc_disable_clock(), dac_disable_clock(), dma_disable(), ebi_cs_read_config(), ebi_cs_write_config(), ebi_disable_cs(), ebi_sdram_read_config(), ebi_sdram_write_config(), ebi_setup_port(), main(), sysclk_disable_peripheral_clock(), sysclk_disable_usb(), and tc_disable().

static void sysclk_disable_peripheral_clock ( const volatile void * module )

inlinestatic

Disable a peripheral's clock from its base address.

Disables the clock to a peripheral, given its base address. If the peripheral has an associated clock on the HSB bus, this will be disabled also.

Parameters

module Pointer to the module's base address.

References Assert, SYSCLK_AC, SYSCLK_ADC, SYSCLK_AES, SYSCLK_DAC, sysclk_disable_module(), SYSCLK_DMA, SYSCLK_EBI, SYSCLK_EDMA, SYSCLK_EVSYS, SYSCLK_HIRES, SYSCLK_PORT_A, SYSCLK_PORT_B, SYSCLK_PORT_C, SYSCLK_PORT_D, SYSCLK_PORT_E, SYSCLK_PORT_F, SYSCLK_PORT_GEN, SYSCLK_RTC, SYSCLK_SPI, SYSCLK_TC0, SYSCLK_TC1, SYSCLK_TC4, SYSCLK_TC5, SYSCLK_TWI, SYSCLK_USART0, SYSCLK_USART1, and SYSCLK_XCL.

Referenced by lowpower_init().

void sysclk_disable_usb ( void )

Disable clock for the USB module.

References ccp_write_io(), sysclk_disable_module(), SYSCLK_PORT_GEN, and SYSCLK_USB.

void sysclk_enable_module	(	enum sysclk_port_id	port,
		uint8_t	id
	)

Enable the clock to peripheral id on port port.

Parameters

port	ID of the port to which the module is connected (one of the `SYSCLK_PORT_*` definitions).
id	The ID (bitmask) of the peripheral module to be enabled.

References cpu_irq_restore(), and cpu_irq_save().

Referenced by ac_enable(), ac_write_config(), adc_enable_clock(), dac_enable_clock(), dma_enable(), ebi_cs_read_config(), ebi_cs_write_config(), ebi_enable_cs(), ebi_sdram_read_config(), ebi_sdram_write_config(), ebi_setup_port(), main(), qdec_enabled_evsys(), rtc_init(), rtc_vbat_system_check(), sal_init(), sound_init(), spi_master_init(), sysclk_enable_peripheral_clock(), sysclk_enable_usb(), tc_enable(), tc_init(), usart_serial_init(), and usart_spi_init().

static void sysclk_enable_peripheral_clock ( const volatile void * module )

inlinestatic

Enable a peripheral's clock from its base address.

Enables the clock to a peripheral, given its base address. If the peripheral has an associated clock on the HSB bus, this will be enabled also.

Parameters

module Pointer to the module's base address.

References Assert, SYSCLK_AC, SYSCLK_ADC, SYSCLK_AES, SYSCLK_DAC, SYSCLK_DMA, SYSCLK_EBI, SYSCLK_EDMA, sysclk_enable_module(), SYSCLK_EVSYS, SYSCLK_HIRES, SYSCLK_PORT_A, SYSCLK_PORT_B, SYSCLK_PORT_C, SYSCLK_PORT_D, SYSCLK_PORT_E, SYSCLK_PORT_F, SYSCLK_PORT_GEN, SYSCLK_RTC, SYSCLK_SPI, SYSCLK_TC0, SYSCLK_TC1, SYSCLK_TC4, SYSCLK_TC5, SYSCLK_TWI, SYSCLK_USART0, SYSCLK_USART1, and SYSCLK_XCL.

Referenced by ili9341_interface_init(), main(), run_baudrate_set_test(), run_twi_master_recv_test(), run_twi_master_send_test(), run_twi_slave_recv_test(), twi_master_setup(), twi_slave_setup(), usart_init_rs232(), and usart_init_spi().

void sysclk_enable_usb ( uint8_t frequency )

Enable clock for the USB module.

Precondition: CONFIG_USBCLK_SOURCE must be defined.

Parameters

frequency

The required USB clock frequency in MHz:

6 for 6 MHz
48 for 48 MHz

References Assert, ccp_write_io(), osc_enable(), osc_enable_autocalibration(), OSC_ID_RC32MHZ, OSC_ID_USBSOF, osc_is_ready(), osc_wait_ready(), pll_enable_config_defaults(), sysclk_enable_module(), SYSCLK_PORT_GEN, and SYSCLK_USB.

static uint32_t sysclk_get_cpu_hz ( void )

inlinestatic

Return the current rate in Hz of the CPU clock.

Returns: Frequency of the CPU clock, in Hz.

References sysclk_get_per_hz().

Referenced by main(), mdelay(), pwm_set_frequency(), run_twi_master_recv_test(), run_twi_master_send_test(), run_twi_slave_recv_test(), sensor_timestamp(), spi_master_setup_device(), twi_master_setup(), and twi_slave_setup().

static uint32_t sysclk_get_main_hz ( void )

inlinestatic

Return the current rate in Hz of the main system clock.

Todo:: This function assumes that the main clock source never changes once it's been set up, and that PLL0 always runs at the compile-time configured default rate. While this is probably the most common configuration, which we want to support as a special case for performance reasons, we will at some point need to support more dynamic setups as well.

Returns: Frequency of the main system clock, in Hz.

References CONFIG_SYSCLK_SOURCE, pll_get_default_rate, SYSCLK_SRC_PLL, SYSCLK_SRC_RC2MHZ, SYSCLK_SRC_RC32KHZ, SYSCLK_SRC_RC32MHZ, and SYSCLK_SRC_XOSC.

Referenced by sysclk_get_per4_hz().

static uint32_t sysclk_get_per2_hz ( void )

inlinestatic

Return the current rate in Hz of clk_PER2.

This clock can run up to two times faster than the CPU clock.

Returns: Frequency of the clk_PER2 clock, in Hz.

References CONFIG_SYSCLK_PSBCDIV, sysclk_get_per4_hz(), SYSCLK_PSBCDIV_1_1, SYSCLK_PSBCDIV_1_2, SYSCLK_PSBCDIV_2_2, and SYSCLK_PSBCDIV_4_1.

Referenced by sysclk_get_per_hz(), and sysclk_get_peripheral_bus_hz().

static uint32_t sysclk_get_per4_hz ( void )

inlinestatic

Return the current rate in Hz of clk_PER4.

This clock can run up to four times faster than the CPU clock.

Returns: Frequency of the clk_PER4 clock, in Hz.

References CONFIG_SYSCLK_PSADIV, sysclk_get_main_hz(), and SYSCLK_PSADIV_512.

Referenced by sysclk_get_per2_hz(), and sysclk_get_peripheral_bus_hz().

static uint32_t sysclk_get_per_hz ( void )

inlinestatic

Return the current rate in Hz of clk_PER.

This clock always runs at the same rate as the CPU clock unless the divider is set.

Returns: Frequency of the clk_PER clock, in Hz.

References CONFIG_SYSCLK_PSBCDIV, and sysclk_get_per2_hz().

Referenced by adc_set_clock_rate(), dac_set_conversion_interval(), dac_set_refresh_interval(), init_save_timer(), main(), qdec_enabled_evsys(), sound_init(), sysclk_get_cpu_hz(), sysclk_get_peripheral_bus_hz(), tc_get_resolution(), tc_set_resolution(), usart_init_rs232(), and usart_init_spi().

static uint32_t sysclk_get_peripheral_bus_hz ( const volatile void * module )

inlinestatic

Retrieves the current rate in Hz of the Peripheral Bus clock attached to the specified peripheral.

Parameters

module Pointer to the module's base address.

Returns: Frequency of the bus attached to the specified peripheral, in Hz.

References Assert, sysclk_get_per2_hz(), sysclk_get_per4_hz(), and sysclk_get_per_hz().

void sysclk_init ( void )

Initialize the synchronous clock system.

This function will initialize the system clock and its source. This includes:

Mask all synchronous clocks except for any clocks which are essential for normal operation (for example internal memory clocks).
Set up the system clock prescalers as specified by the application's configuration file.
Enable the clock source specified by the application's configuration file (oscillator or PLL) and wait for it to become stable.
Set the main system clock source to the clock specified by the application's configuration file.

Since all non-essential peripheral clocks are initially disabled, it is the responsibility of the peripheral driver to re-enable any clocks that are needed for normal operation.

References Assert, ccp_write_io(), CONFIG_SYSCLK_PSADIV, CONFIG_SYSCLK_PSBCDIV, CONFIG_SYSCLK_SOURCE, LSB, MSB, nvm_get_production_signature_row_offset, nvm_read_production_signature_row(), osc_disable(), osc_enable(), osc_enable_autocalibration(), OSC_ID_RC2MHZ, OSC_ID_RC32KHZ, OSC_ID_RC32MHZ, OSC_ID_USBSOF, OSC_ID_XOSC, osc_user_calibration(), osc_wait_ready(), pll_enable_config_defaults(), PLL_SRC_RC2MHZ, SYSCLK_PORT_F, SYSCLK_PSADIV_1, SYSCLK_PSBCDIV_1_1, sysclk_rtcsrc_enable(), sysclk_set_prescalers(), SYSCLK_SRC_PLL, SYSCLK_SRC_RC2MHZ, SYSCLK_SRC_RC32KHZ, SYSCLK_SRC_RC32MHZ, SYSCLK_SRC_XOSC, and UNUSED.

Referenced by main(), and sensor_platform_init().

static void sysclk_lock ( void )

inlinestatic

Lock the system clock configuration.

This function will lock the current system clock source and prescaler configuration, preventing any further changes.

References ccp_write_io().

static bool sysclk_module_is_enabled	(	enum sysclk_port_id	port,
		uint8_t	id
	)

inlinestatic

Check if the synchronous clock is enabled for a module.

Parameters

port	ID of the port to which the module is connected (one of the `SYSCLK_PORT_*` definitions).
id	The ID (bitmask) of the peripheral module to check (one of the `SYSCLK_*` module definitions).

Return values

true	If the clock for module id on port is enabled.
false	If the clock for module id on port is disabled.

Referenced by ebi_cs_read_config(), ebi_cs_write_config(), ebi_sdram_read_config(), ebi_sdram_write_config(), and ebi_setup_port().

static void sysclk_rtcsrc_disable ( void )

inlinestatic

Disable RTC clock.

static void sysclk_rtcsrc_enable ( uint8_t id )

inlinestatic

Enable RTC clock with specified clock source.

Parameters

id	RTC clock source ID. Select from SYSCLK_RTCSRC_ULP, SYSCLK_RTCSRC_RCOSC, SYSCLK_RTCSRC_TOSC, SYSCLK_RTCSRC_RCOSC32, SYSCLK_RTCSRC_TOSC32 or SYSCLK_RTCSRC_EXTCLK

References Assert, osc_enable(), OSC_ID_RC32KHZ, OSC_ID_XOSC, osc_wait_ready(), SYSCLK_RTCSRC_EXTCLK, SYSCLK_RTCSRC_RCOSC, SYSCLK_RTCSRC_RCOSC32, SYSCLK_RTCSRC_TOSC, and SYSCLK_RTCSRC_TOSC32.

Referenced by sysclk_init().

static void sysclk_set_prescalers	(	uint8_t	psadiv,
		uint8_t	psbcdiv
	)

inlinestatic

Set system clock prescaler configuration.

This function will change the system clock prescaler configuration to match the parameters.

Note: The parameters to this function are device-specific.

Parameters

psadiv	The prescaler A setting (one of the `SYSCLK_PSADIV_*` definitions). This determines the clkPER4 frequency.
psbcdiv	The prescaler B and C settings (one of the `SYSCLK_PSBCDIV_*` definitions). These determine the clkPER2, clkPER and clkCPU frequencies.

References ccp_write_io().

Referenced by main(), and sysclk_init().

static void sysclk_set_source ( uint8_t src )

inlinestatic

Change the source of the main system clock.

Parameters

src	The new system clock source. Must be one of the constants from the System Clock Sources section.

References ccp_write_io().

Referenced by main().

Microchip® Advanced Software Framework

Platform Dependencies

Configuration Symbols

System Clock Sources

Prescaler A Setting (relative to CLKsys)

Prescaler B and C Setting (relative to CLKper4)

System Clock Port Numbers

Clocks not associated with any port

Clocks on PORTA and PORTB

Clocks on PORTC, PORTD, PORTE and PORTF

RTC clock source identifiers

Querying the system clock and its derived clocks

Enabling and disabling synchronous clocks

System Clock Source and Prescaler configuration

RTC clock source control

System Clock Initialization