Peripheral Parallel Input/Output (PIO) Controller | |
Power Management Controller (PMC) | |
Universal Asynchronous Receiver Transceiver (UART) | The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for communication and trace purposes and offers an ideal medium for in-situ programming solutions |
Ethernet Media Access Controller | See Quickstart guide for EMAC driver. |
PHY component (DM9161A) | Driver for the dm9161a component |
Universal Synchronous Asynchronous | Receiver Transmitter (USART) |
Standard I/O (stdio) | Common standard I/O driver that implements the stdio read and write functions on AVR and SAM devices |
 Standard serial I/O (stdio) | Common standard serial I/O management driver that implements a stdio serial interface on AVR and SAM devices |
Generic board support | The generic board support module includes board-specific definitions and function prototypes, such as the board initialization function |
Compiler abstraction layer and code utilities | Compiler abstraction layer and code utilities for AT91SAM |
 Preprocessor - Macro Repeat | |
 Preprocessor - Stringize | |
 Preprocessor - Token Paste | |
Global interrupt management | This is a driver for global enabling and disabling of interrupts |
 Deprecated interrupt definitions | |
Atmel part identification macros | This collection of macros identify which series and families that the various Atmel parts belong to |
 AVR UC3 parts | |
 AVR XMEGA parts | |
 megaAVR parts | |
 SAM parts | |
General Purpose Input/Output | This is the common API for GPIO |
Power Manager (PM) | This is a stub on the SAM Power Manager Control (PMC) for the sleepmgr service |
Common IOPORT API | See Quick start guide for the common IOPORT service |
Clock Management | |
 Generic Clock Management | Generic clocks are configurable clocks which run outside the system clock domain |
 Oscillator Management | This group contains functions and definitions related to configuring and enabling/disabling on-chip oscillators |
 PLL Management | This group contains functions and definitions related to configuring and enabling/disabling on-chip PLLs |
 System Clock Management | See Quick Start Guide for the System Clock Management service (SAM3A) |
xCoRoutineCreate | Croutine |
vCoRoutineSchedule | Croutine |
crSTART | Croutine |
crDELAY | Croutine |
crQUEUE_SEND | |
crQUEUE_RECEIVE | Croutine |
crQUEUE_SEND_FROM_ISR | Croutine |
crQUEUE_RECEIVE_FROM_ISR | Croutine |
EventGroup | An event group is a collection of bits to which an application can assign a meaning |
 EventGroupHandle_t | Event_groups.h |
 xEventGroupCreate | Event_groups.h |
 xEventGroupWaitBits | Event_groups.h |
 xEventGroupClearBits | Event_groups.h |
 xEventGroupClearBitsFromISR | Event_groups.h |
 xEventGroupSetBits | Event_groups.h |
 xEventGroupSetBitsFromISR | Event_groups.h |
 xEventGroupSync | Event_groups.h |
 xEventGroupGetBits | Event_groups.h |
 xEventGroupGetBitsFromISR | Event_groups.h |
xMessageBufferCreate | Message_buffer.h |
xMessageBufferCreateStatic | Message_buffer.h |
xMessageBufferSend | Message_buffer.h |
xMessageBufferSendFromISR | Message_buffer.h |
xMessageBufferReceive | Message_buffer.h |
xMessageBufferReceiveFromISR | Message_buffer.h |
xMessageBufferReset | Message_buffer.h |
xMessageBufferSpaceAvailable | Message_buffer.h |
xMessageBufferSendCompletedFromISR | Message_buffer.h |
xMessageBufferReceiveCompletedFromISR | Message_buffer.h |
xQueueCreate | Queue |
xQueueCreateStatic | Queue |
xQueueSend | Queue |
xQueueOverwrite | Queue |
xQueuePeek | Queue |
xQueuePeekFromISR | Queue |
xQueueReceive | Queue |
uxQueueMessagesWaiting | Queue |
vQueueDelete | Queue |
xQueueSendFromISR | Queue |
xQueueOverwriteFromISR | Queue |
xQueueReceiveFromISR | Queue |
vSemaphoreCreateBinary | Semphr |
xSemaphoreCreateBinary | Semphr |
xSemaphoreCreateBinaryStatic | Semphr |
xSemaphoreTake | Semphr |
xSemaphoreTakeRecursive | Semphr |
xSemaphoreGive | Semphr |
xSemaphoreGiveRecursive | Semphr |
xSemaphoreGiveFromISR | Semphr |
xSemaphoreCreateMutex | Semphr |
xSemaphoreCreateMutexStatic | Semphr |
xSemaphoreCreateRecursiveMutex | Semphr |
xSemaphoreCreateRecursiveMutexStatic | Semphr |
xSemaphoreCreateCounting | Semphr |
xSemaphoreCreateCountingStatic | Semphr |
vSemaphoreDelete | Semphr |
xStreamBufferCreate | Message_buffer.h |
xStreamBufferCreateStatic | Stream_buffer.h |
xStreamBufferSend | Stream_buffer.h |
xStreamBufferSendFromISR | Stream_buffer.h |
xStreamBufferReceive | Stream_buffer.h |
xStreamBufferReceiveFromISR | Stream_buffer.h |
vStreamBufferDelete | Stream_buffer.h |
xStreamBufferIsFull | Stream_buffer.h |
xStreamBufferIsEmpty | Stream_buffer.h |
xStreamBufferReset | Stream_buffer.h |
xStreamBufferSpacesAvailable | Stream_buffer.h |
xStreamBufferBytesAvailable | Stream_buffer.h |
xStreamBufferSetTriggerLevel | Stream_buffer.h |
xStreamBufferSendCompletedFromISR | Stream_buffer.h |
xStreamBufferReceiveCompletedFromISR | Stream_buffer.h |
TaskHandle_t | Task |
taskYIELD | Task |
taskENTER_CRITICAL | Task |
taskEXIT_CRITICAL | Task |
taskDISABLE_INTERRUPTS | Task |
taskENABLE_INTERRUPTS | Task |
xTaskCreate | Task |
xTaskCreateStatic | Task |
xTaskCreateRestricted | Task |
xTaskCreateRestrictedStatic | Task |
vTaskDelete | Task |
vTaskDelay | Task |
vTaskDelayUntil | Task |
xTaskAbortDelay | Task |
uxTaskPriorityGet | Task |
vTaskGetInfo | Task |
vTaskPrioritySet | Task |
vTaskSuspend | Task |
vTaskResume | Task |
vTaskResumeFromISR | Task |
vTaskStartScheduler | Task |
vTaskEndScheduler | Task |
vTaskSuspendAll | Task |
xTaskResumeAll | Task |
xTaskGetTickCount | Task |
xTaskGetTickCountFromISR | Task |
uxTaskGetNumberOfTasks | Task |
pcTaskGetName | Task |
pcTaskGetHandle | Task |
vTaskList | Task |
vTaskGetRunTimeStats | Task |
xTaskNotify | Task |
xTaskNotifyWait | Task |
xTaskNotifyGive | Task |
ulTaskNotifyTake | Task |
xTaskNotifyStateClear | Task |
SAM3/4S/4L/4E/4N/4CM/4C/G Timer Counter (TC) Driver | This driver for Atmel® | SMART ARM®-based microcontrollers provides an interface for the configuration and management of the device's Timer Counter functionality |
SAM3/4C/4CM/4CP/4E/4N/4S/G/V71/V70/S70/E70 Reset Controller (RSTC) Driver | This driver for Atmel® | SMART ARM®-based microcontrollers provides an interface for the configuration and management of the device's Reset Controller functionality |
Ethernet Phy | This is the common API for Ethernet Phy on ARMs |
Serial Interface (Serial) | See Quick start guide for Serial Interface service |
Universal Synchronous Asynchronous Receiver | Transmitter (USART) |
Eth_phy_mii | |
 PHY registers Addresses | |
 Basic Mode Control Register (BMCR, 0) | List Bit definitions: MII_BMCR |
 Basic Mode Status Register (BMSR, 1) | Reserved bits: 6 to 0, Read as 0, ignore on write |
 PHY ID Identifier Register (PHYID, 2,3) | List definitions: MII_PHYID1, MII_PHYID2 |
 Auto-negotiation (ANAR, 4; ANLPAR, 5) | |
 Auto-negotiation Expansion Register (ANER, 6) | List Bit definitions: MII_ANER |
 Specified Configuration Register (DSCR, 16) | List Bit definitions: MII_DSCR |
 Specified Configuration and Status Register (DSCSR, 17) | List Bit definitions: MII_DSCSR |
 10BASE-T Configuration/Status (10BTCSR, 18) | List Bit definitions: MII_10BTCSR |
 Specified Interrupt Register (MDINTR, 21) | List Bit definitions: MII_MDINTR |