See Quick Start Guide for the System Clock Management service (SAM4L).
The sysclk API covers the system clock and all clocks derived from it. The system clock is a chip-internal clock on which all synchronous clocks, i.e. CPU and bus/peripheral clocks, are based. The system clock is typically generated from one of a variety of sources, which may include crystal and RC oscillators as well as PLLs. The clocks derived from the system clock are sometimes also known as synchronous clocks, since they always run synchronously with respect to each other, as opposed to generic clocks which may run from different oscillators or PLLs.
Most applications should simply call sysclk_init() to initialize everything related to the system clock and its source (oscillator, PLL or DFLL), and leave it at that. More advanced applications, and platform-specific drivers, may require additional services from the clock system, some of which may be platform-specific.
The sysclk API is partially chip- or platform-specific. While all platforms provide mostly the same functionality, there are some variations around how different bus types and clock tree structures are handled.
The following functions are available on all platforms with the same parameters and functionality. These functions may be called freely by portable applications, drivers and services:
The following functions are available on all platforms, but there may be variations in the function signature (i.e. parameters) and behavior. These functions are typically called by platform-specific parts of drivers, and applications that aren't intended to be portable:
All other functions should be considered platform-specific. Enabling/disabling clocks to specific peripherals as well as determining the speed of these clocks should be done by calling functions provided by the driver for that peripheral.
Modules | |
System Clock internals | |
Macros | |
#define | CONFIG_HCACHE_ENABLE 1 |
#define | CONFIG_SYSCLK_CPU_DIV 0 |
Configuration symbol for dividing the CPU clock frequency by \(2^{CONFIG\_SYSCLK\_CPU\_DIV}\). More... | |
#define | CONFIG_SYSCLK_INIT_CPUMASK |
Configuration symbol for the CPU clocks enabled at power-on after the sysclock module has been initialized. More... | |
#define | CONFIG_SYSCLK_INIT_HSBMASK |
Configuration symbol for the HSB clocks enabled at power-on after the sysclock module has been initialized. More... | |
#define | CONFIG_SYSCLK_INIT_PBAMASK |
Configuration symbol for the PBA clocks enabled at power-on after the sysclock module has been initialized. More... | |
#define | CONFIG_SYSCLK_INIT_PBBMASK |
Configuration symbol for the PBB clocks enabled at power-on after the sysclock module has been initialized. More... | |
#define | CONFIG_SYSCLK_INIT_PBCMASK |
Configuration symbol for the PBC clocks enabled at power-on after the sysclock module has been initialized. More... | |
#define | CONFIG_SYSCLK_INIT_PBDMASK |
Configuration symbol for the PBD clocks enabled at power-on after the sysclock module has been initialized. More... | |
#define | CONFIG_SYSCLK_PBA_DIV 0 |
Configuration symbol for dividing the PBA clock frequency by \(2^{CONFIG\_SYSCLK\_PBA\_DIV}\). More... | |
#define | CONFIG_SYSCLK_PBB_DIV 0 |
Configuration symbol for dividing the PBB clock frequency by \(2^{CONFIG\_SYSCLK\_PBB\_DIV}\). More... | |
#define | CONFIG_SYSCLK_PBC_DIV 0 |
Configuration symbol for dividing the PBC clock frequency by \(2^{CONFIG\_SYSCLK\_PBC\_DIV}\). More... | |
#define | CONFIG_SYSCLK_PBD_DIV 0 |
Configuration symbol for dividing the PBD clock frequency by \(2^{CONFIG\_SYSCLK\_PBD\_DIV}\). More... | |
#define | CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS |
#define | CONFIG_USBCLK_DIV |
Configuration symbol for the USB generic clock divider setting. More... | |
#define | CONFIG_USBCLK_SOURCE |
Configuration symbol for the USB generic clock source. More... | |
#define | USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/OSC_RCSYS_NOMINAL_HZ)) |
Number of us to wait for USB clock to start. More... | |
Functions | |
void | sysclk_disable_usb (void) |
Disable the USB generic clock. More... | |
void | sysclk_enable_usb (void) |
Enable the USB generic clock. More... | |
void | sysclk_priv_disable_module (uint32_t bus_id, uint32_t module_index) |
Disable a maskable module clock. More... | |
void | sysclk_priv_enable_module (uint32_t bus_id, uint32_t module_index) |
Enable a maskable module clock. More... | |
System Clock Initialization | |
void | sysclk_init (void) |
Initialize the synchronous clock system. More... | |
System clock source | |
#define | SYSCLK_SRC_RCSYS 0 |
System RC oscillator. More... | |
#define | SYSCLK_SRC_OSC0 1 |
Oscillator 0. More... | |
#define | SYSCLK_SRC_PLL0 2 |
Phase Locked Loop 0. More... | |
#define | SYSCLK_SRC_DFLL 3 |
Digital Frequency Locked Loop. More... | |
#define | SYSCLK_SRC_RC80M 4 |
80 MHz RC oscillator More... | |
#define | SYSCLK_SRC_RCFAST 5 |
4-8-12 MHz RC oscillator More... | |
#define | SYSCLK_SRC_RC1M 6 |
1 MHz RC oscillator More... | |
USB Clock Sources | |
#define | USBCLK_SRC_OSC0 GENCLK_SRC_OSC0 |
Use OSC0. More... | |
#define | USBCLK_SRC_PLL0 GENCLK_SRC_PLL0 |
Use PLL0. More... | |
#define | USBCLK_SRC_DFLL GENCLK_SRC_DFLL |
Use DFLL. More... | |
#define | USBCLK_SRC_GCLKIN0 GENCLK_SRC_GCLKIN0 |
Use GCLKIN0. More... | |
Bus index of maskable module clocks | |
#define | PM_CLK_GRP_CPU 0 |
#define | PM_CLK_GRP_HSB 1 |
#define | PM_CLK_GRP_PBA 2 |
#define | PM_CLK_GRP_PBB 3 |
#define | PM_CLK_GRP_PBC 4 |
#define | PM_CLK_GRP_PBD 5 |
Clocks derived from the CPU clock | |
#define | SYSCLK_OCD 0 |
On-Chip Debug system. More... | |
Clocks derived from the HSB clock | |
#define | SYSCLK_PDCA_HSB 0 |
PDCA memory interface. More... | |
#define | SYSCLK_HFLASHC_DATA 1 |
Flash data interface. More... | |
#define | SYSCLK_HRAMC1_DATA 2 |
HRAMC data interface. More... | |
#define | SYSCLK_USBC_DATA 3 |
USBC DMA and FIFO interface. More... | |
#define | SYSCLK_CRCCU_DATA 4 |
CRCCU data interface. More... | |
#define | SYSCLK_PBA_BRIDGE 5 |
HSB<->PBA bridge. More... | |
#define | SYSCLK_PBB_BRIDGE 6 |
HSB<->PBB bridge. More... | |
#define | SYSCLK_PBC_BRIDGE 7 |
HSB<->PBC bridge. More... | |
#define | SYSCLK_PBD_BRIDGE 8 |
HSB<->PBD bridge. More... | |
#define | SYSCLK_AESA_HSB 9 |
Advanced Encryption Standard. More... | |
Clocks derived from the PBA clock | |
#define | SYSCLK_IISC 0 |
IISC Controller. More... | |
#define | SYSCLK_SPI 1 |
SPI Controller. More... | |
#define | SYSCLK_TC0 2 |
Timer/Counter 0. More... | |
#define | SYSCLK_TC1 3 |
Timer/Counter 1. More... | |
#define | SYSCLK_TWIM0 4 |
TWI Master 0. More... | |
#define | SYSCLK_TWIS0 5 |
TWI Slave 0. More... | |
#define | SYSCLK_TWIM1 6 |
TWI Master 1. More... | |
#define | SYSCLK_TWIS1 7 |
TWI Slave 1. More... | |
#define | SYSCLK_USART0 8 |
USART 0. More... | |
#define | SYSCLK_USART1 9 |
USART 1. More... | |
#define | SYSCLK_USART2 10 |
USART 2. More... | |
#define | SYSCLK_USART3 11 |
USART 3. More... | |
#define | SYSCLK_ADCIFE 12 |
A/D Converter. More... | |
#define | SYSCLK_DACC 13 |
D/A Converter. More... | |
#define | SYSCLK_ACIFC 14 |
Analog Comparator. More... | |
#define | SYSCLK_GLOC 15 |
Glue Logic Controller. More... | |
#define | SYSCLK_ABDACB 16 |
ABDACB Controller. More... | |
#define | SYSCLK_TRNG 17 |
TRNG Controller. More... | |
#define | SYSCLK_PARC 18 |
PARC Controller. More... | |
#define | SYSCLK_CATB 19 |
Capacitive Touch. More... | |
#define | SYSCLK_TWIM2 21 |
TWI Master 2. More... | |
#define | SYSCLK_TWIM3 22 |
TWI Master 3. More... | |
#define | SYSCLK_LCDCA 23 |
LCD Controller. More... | |
Clocks derived from the PBB clock | |
#define | SYSCLK_HFLASHC_REGS 0 |
Flash Controller registers. More... | |
#define | SYSCLK_HRAMC1_REGS 1 |
HRAMC Controller registers. More... | |
#define | SYSCLK_HMATRIX 2 |
HSB Matrix configuration. More... | |
#define | SYSCLK_PDCA_PB 3 |
PDCA peripheral bus interface. More... | |
#define | SYSCLK_CRCCU_REGS 4 |
CRCCU registers. More... | |
#define | SYSCLK_USBC_REGS 5 |
USBC registers. More... | |
#define | SYSCLK_PEVC 6 |
PEVC Controller. More... | |
Clocks derived from the PBC clock | |
#define | SYSCLK_PM 0 |
PM configuration. More... | |
#define | SYSCLK_CHIPID 1 |
CHIPID Controller. More... | |
#define | SYSCLK_SCIF 2 |
System Control Interface. More... | |
#define | SYSCLK_FREQM 3 |
Frequency Meter. More... | |
#define | SYSCLK_GPIO 4 |
General-Purpose I/O. More... | |
Clocks derived from the PBD clock | |
#define | SYSCLK_BPM 0 |
BPM configuration. More... | |
#define | SYSCLK_BSCIF 1 |
BSCIF configuration. More... | |
#define | SYSCLK_AST 2 |
Asynchronous Timer. More... | |
#define | SYSCLK_WDT 3 |
Watchdog Timer. More... | |
#define | SYSCLK_EIC 4 |
External Interrupt Controller. More... | |
#define | SYSCLK_PICOUART 5 |
PICOUART. More... | |
Divided clock mask derived from the PBA clock | |
#define | PBA_DIVMASK_TIMER_CLOCK2 (1u << 0) |
TIMER_CLOCK2 mask. More... | |
#define | PBA_DIVMASK_TIMER_CLOCK3 (1u << 2) |
TIMER_CLOCK3 mask. More... | |
#define | PBA_DIVMASK_CLK_USART (1u << 2) |
CLK_USART/DIV mask. More... | |
#define | PBA_DIVMASK_TIMER_CLOCK4 (1u << 4) |
TIMER_CLOCK4 mask. More... | |
#define | PBA_DIVMASK_TIMER_CLOCK5 (1u << 6) |
TIMER_CLOCK5 mask. More... | |
#define | PBA_DIVMASK_Msk (0x7Fu << 0) |
Bitfield mask. More... | |
Querying the system clock and its derived clocks | |
The following functions may be used to query the current frequency of the system clock and the CPU and bus clocks derived from it. sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be available on all platforms, although some platforms may define additional accessors for various chip-internal bus clocks. These are usually not intended to be queried directly by generic code. | |
uint32_t | sysclk_get_peripheral_bus_hz (const volatile void *module) |
Retrieves the current rate in Hz of the Peripheral Bus clock attached to the specified peripheral. More... | |
static uint32_t | sysclk_get_main_hz (void) |
Return the current rate in Hz of the main system clock. More... | |
static uint32_t | sysclk_get_cpu_hz (void) |
Return the current rate in Hz of the CPU clock. More... | |
static uint32_t | sysclk_get_hsb_hz (void) |
Return the current rate in Hz of the High-Speed Bus clock. More... | |
static uint32_t | sysclk_get_pba_hz (void) |
Return the current rate in Hz of the Peripheral Bus A clock. More... | |
static uint32_t | sysclk_get_pbb_hz (void) |
Return the current rate in Hz of the Peripheral Bus B clock. More... | |
static uint32_t | sysclk_get_pbc_hz (void) |
Return the current rate in Hz of the Peripheral Bus C clock. More... | |
static uint32_t | sysclk_get_pbd_hz (void) |
Return the current rate in Hz of the Peripheral Bus D clock. More... | |
Enabling and disabling synchronous clocks | |
void | sysclk_enable_pba_module (uint32_t module_index) |
Enable a module clock derived from the PBA clock. More... | |
void | sysclk_disable_pba_module (uint32_t module_index) |
Disable a module clock derived from the PBA clock. More... | |
void | sysclk_enable_pbb_module (uint32_t module_index) |
Enable a module clock derived from the PBB clock. More... | |
void | sysclk_disable_pbb_module (uint32_t module_index) |
Disable a module clock derived from the PBB clock. More... | |
void | sysclk_enable_peripheral_clock (const volatile void *module) |
Enable a peripheral's clock from its base address. More... | |
void | sysclk_disable_peripheral_clock (const volatile void *module) |
Disable a peripheral's clock from its base address. More... | |
static void | sysclk_enable_cpu_module (uint32_t module_index) |
Enable a module clock derived from the CPU clock. More... | |
static void | sysclk_disable_cpu_module (uint32_t module_index) |
Disable a module clock derived from the CPU clock. More... | |
static void | sysclk_enable_hsb_module (uint32_t module_index) |
Enable a module clock derived from the HSB clock. More... | |
static void | sysclk_disable_hsb_module (uint32_t module_index) |
Disable a module clock derived from the HSB clock. More... | |
static void | sysclk_enable_pbc_module (uint32_t module_index) |
Enable a module clock derived from the PBC clock. More... | |
static void | sysclk_disable_pbc_module (uint32_t module_index) |
Disable a module clock derived from the PBC clock. More... | |
static void | sysclk_enable_pbd_module (uint32_t module_index) |
Enable a module clock derived from the PBD clock. More... | |
static void | sysclk_disable_pbd_module (uint32_t module_index) |
Disable a module clock derived from the PBD clock. More... | |
static void | sysclk_enable_pba_divmask (uint32_t mask) |
Enable divided clock mask derived from the PBA clock. More... | |
static void | sysclk_disable_pba_divmask (uint32_t mask) |
Disable divided clock mask derived from the PBA clock. More... | |
System Clock Source and Prescaler configuration | |
void | sysclk_set_prescalers (uint32_t cpu_shift, uint32_t pba_shift, uint32_t pbb_shift, uint32_t pbc_shift, uint32_t pbd_shift) |
Set system clock prescaler configuration. More... | |
void | sysclk_set_source (uint32_t src) |
Change the source of the main system clock. More... | |
#define CONFIG_HCACHE_ENABLE 1 |
#define CONFIG_SYSCLK_CPU_DIV 0 |
Configuration symbol for dividing the CPU clock frequency by \(2^{CONFIG\_SYSCLK\_CPU\_DIV}\).
If this symbol is not defined, the CPU clock frequency is not divided.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_get_cpu_hz(), sysclk_get_hsb_hz(), and sysclk_init().
#define CONFIG_SYSCLK_INIT_CPUMASK |
Configuration symbol for the CPU clocks enabled at power-on after the sysclock module has been initialized.
By default, all CPU clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx
settings.
If this symbol is not defined, then all CPU clocks are left enabled.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_HSBMASK |
Configuration symbol for the HSB clocks enabled at power-on after the sysclock module has been initialized.
By default, all HSB clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx
settings.
If this symbol is not defined, then all HSB clocks are left enabled.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBAMASK |
Configuration symbol for the PBA clocks enabled at power-on after the sysclock module has been initialized.
By default, all PBA clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx
settings.
If this symbol is not defined, then all PBA clocks are left enabled.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBBMASK |
Configuration symbol for the PBB clocks enabled at power-on after the sysclock module has been initialized.
By default, all PBB clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx
settings.
If this symbol is not defined, then all PBB clocks are left enabled.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBCMASK |
Configuration symbol for the PBC clocks enabled at power-on after the sysclock module has been initialized.
By default, all PBC clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx
settings.
If this symbol is not defined, then all PBC clocks are left enabled.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBDMASK |
Configuration symbol for the PBD clocks enabled at power-on after the sysclock module has been initialized.
By default, all PBD clocks are left enabled, however to save power these can be automatically disabled by defining this value to a mask of SYSCLOCK_xxx
settings.
If this symbol is not defined, then all PBD clocks are left enabled.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBA_DIV 0 |
Configuration symbol for dividing the PBA clock frequency by \(2^{CONFIG\_SYSCLK\_PBA\_DIV}\).
If this symbol is not defined, the PBA clock frequency is not divided.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_get_pba_hz(), and sysclk_init().
#define CONFIG_SYSCLK_PBB_DIV 0 |
Configuration symbol for dividing the PBB clock frequency by \(2^{CONFIG\_SYSCLK\_PBB\_DIV}\).
If this symbol is not defined, the PBB clock frequency is not divided.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_get_pbb_hz(), and sysclk_init().
#define CONFIG_SYSCLK_PBC_DIV 0 |
Configuration symbol for dividing the PBC clock frequency by \(2^{CONFIG\_SYSCLK\_PBC\_DIV}\).
If this symbol is not defined, the PBC clock frequency is not divided.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_get_pbc_hz(), and sysclk_init().
#define CONFIG_SYSCLK_PBD_DIV 0 |
Configuration symbol for dividing the PBD clock frequency by \(2^{CONFIG\_SYSCLK\_PBD\_DIV}\).
If this symbol is not defined, the PBD clock frequency is not divided.
This symbol may be defined in conf_clock.h.
Referenced by sysclk_get_pbd_hz(), and sysclk_init().
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS |
Referenced by sysclk_get_main_hz(), and sysclk_init().
#define CONFIG_USBCLK_DIV |
Configuration symbol for the USB generic clock divider setting.
Sets the clock division for the USB generic clock. If a USB clock source is selected with CONFIG_USBCLK_SOURCE, this configuration symbol must also be defined.
Define this as any value that does not exceed GENCLK_DIV_MAX
, and which will give a 48 MHz clock frequency from the selected source.
Referenced by sysclk_enable_usb().
#define CONFIG_USBCLK_SOURCE |
Configuration symbol for the USB generic clock source.
Sets the clock source to use for the USB. The source must also be properly configured.
Define this to one of the USBCLK_SRC_xxx
settings. Leave it undefined if USB is not required.
Referenced by sysclk_enable_usb().
#define PBA_DIVMASK_CLK_USART (1u << 2) |
CLK_USART/DIV mask.
Referenced by sysclk_enable_peripheral_clock().
#define PBA_DIVMASK_Msk (0x7Fu << 0) |
Bitfield mask.
Referenced by sysclk_disable_peripheral_clock().
#define PBA_DIVMASK_TIMER_CLOCK2 (1u << 0) |
TIMER_CLOCK2 mask.
Referenced by sysclk_enable_peripheral_clock().
#define PBA_DIVMASK_TIMER_CLOCK3 (1u << 2) |
TIMER_CLOCK3 mask.
Referenced by sysclk_enable_peripheral_clock().
#define PBA_DIVMASK_TIMER_CLOCK4 (1u << 4) |
TIMER_CLOCK4 mask.
Referenced by sysclk_enable_peripheral_clock().
#define PBA_DIVMASK_TIMER_CLOCK5 (1u << 6) |
TIMER_CLOCK5 mask.
Referenced by sysclk_enable_peripheral_clock().
#define PM_CLK_GRP_CPU 0 |
Referenced by sysclk_disable_cpu_module(), and sysclk_enable_cpu_module().
#define PM_CLK_GRP_HSB 1 |
Referenced by sysclk_disable_hsb_module(), and sysclk_enable_hsb_module().
#define PM_CLK_GRP_PBA 2 |
Referenced by sysclk_disable_pba_module(), and sysclk_enable_pba_module().
#define PM_CLK_GRP_PBB 3 |
Referenced by sysclk_disable_pbb_module(), and sysclk_enable_pbb_module().
#define PM_CLK_GRP_PBC 4 |
Referenced by sysclk_disable_pbc_module(), and sysclk_enable_pbc_module().
#define PM_CLK_GRP_PBD 5 |
Referenced by sysclk_disable_pbd_module(), and sysclk_enable_pbd_module().
#define SYSCLK_ABDACB 16 |
ABDACB Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_ACIFC 14 |
Analog Comparator.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_ADCIFE 12 |
A/D Converter.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_AESA_HSB 9 |
Advanced Encryption Standard.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_AST 2 |
Asynchronous Timer.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_BPM 0 |
BPM configuration.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_BSCIF 1 |
BSCIF configuration.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_CATB 19 |
Capacitive Touch.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_CHIPID 1 |
CHIPID Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_CRCCU_DATA 4 |
CRCCU data interface.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_CRCCU_REGS 4 |
CRCCU registers.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_DACC 13 |
D/A Converter.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_EIC 4 |
External Interrupt Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_FREQM 3 |
Frequency Meter.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_GLOC 15 |
Glue Logic Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_GPIO 4 |
General-Purpose I/O.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_HFLASHC_DATA 1 |
Flash data interface.
Referenced by sysclk_enable_peripheral_clock().
#define SYSCLK_HFLASHC_REGS 0 |
Flash Controller registers.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_HMATRIX 2 |
HSB Matrix configuration.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_HRAMC1_DATA 2 |
HRAMC data interface.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_HRAMC1_REGS 1 |
HRAMC Controller registers.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_IISC 0 |
IISC Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_LCDCA 23 |
LCD Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_OCD 0 |
On-Chip Debug system.
#define SYSCLK_PARC 18 |
PARC Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_PBA_BRIDGE 5 |
HSB<->PBA bridge.
Referenced by main(), sysclk_disable_pba_module(), and sysclk_enable_pba_module().
#define SYSCLK_PBB_BRIDGE 6 |
HSB<->PBB bridge.
Referenced by sysclk_disable_pbb_module(), and sysclk_enable_pbb_module().
#define SYSCLK_PBC_BRIDGE 7 |
HSB<->PBC bridge.
#define SYSCLK_PBD_BRIDGE 8 |
HSB<->PBD bridge.
#define SYSCLK_PDCA_HSB 0 |
PDCA memory interface.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_PDCA_PB 3 |
PDCA peripheral bus interface.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_PEVC 6 |
PEVC Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_PICOUART 5 |
PICOUART.
Referenced by picouart_set_config(), sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_PM 0 |
PM configuration.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_SCIF 2 |
System Control Interface.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_SPI 1 |
SPI Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_SRC_DFLL 3 |
Digital Frequency Locked Loop.
Referenced by main(), sysclk_get_main_hz(), and sysclk_init().
#define SYSCLK_SRC_OSC0 1 |
Oscillator 0.
Referenced by main(), sysclk_get_main_hz(), and sysclk_init().
#define SYSCLK_SRC_PLL0 2 |
Phase Locked Loop 0.
Referenced by main(), run_iis_test(), sysclk_get_main_hz(), and sysclk_init().
#define SYSCLK_SRC_RC1M 6 |
1 MHz RC oscillator
Referenced by main(), sysclk_get_main_hz(), sysclk_init(), and sysclk_set_source().
#define SYSCLK_SRC_RC80M 4 |
80 MHz RC oscillator
Referenced by main(), sysclk_get_main_hz(), and sysclk_init().
#define SYSCLK_SRC_RCFAST 5 |
4-8-12 MHz RC oscillator
Referenced by main(), sysclk_get_main_hz(), and sysclk_init().
#define SYSCLK_SRC_RCSYS 0 |
System RC oscillator.
Referenced by main(), sysclk_get_main_hz(), and sysclk_init().
#define SYSCLK_TC0 2 |
Timer/Counter 0.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_TC1 3 |
Timer/Counter 1.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_TRNG 17 |
TRNG Controller.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_TWIM0 4 |
TWI Master 0.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_TWIM1 6 |
TWI Master 1.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_TWIM2 21 |
TWI Master 2.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_TWIM3 22 |
TWI Master 3.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_TWIS0 5 |
TWI Slave 0.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_TWIS1 7 |
TWI Slave 1.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_USART0 8 |
USART 0.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_USART1 9 |
USART 1.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_USART2 10 |
USART 2.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_USART3 11 |
USART 3.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define SYSCLK_USBC_DATA 3 |
USBC DMA and FIFO interface.
Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), and sysclk_enable_usb().
#define SYSCLK_USBC_REGS 5 |
USBC registers.
Referenced by sysclk_disable_peripheral_clock(), sysclk_enable_peripheral_clock(), and sysclk_enable_usb().
#define SYSCLK_WDT 3 |
Watchdog Timer.
Referenced by sysclk_disable_peripheral_clock(), and sysclk_enable_peripheral_clock().
#define USBCLK_SRC_DFLL GENCLK_SRC_DFLL |
Use DFLL.
#define USBCLK_SRC_GCLKIN0 GENCLK_SRC_GCLKIN0 |
Use GCLKIN0.
#define USBCLK_SRC_OSC0 GENCLK_SRC_OSC0 |
Use OSC0.
#define USBCLK_SRC_PLL0 GENCLK_SRC_PLL0 |
Use PLL0.
#define USBCLK_STARTUP_TIMEOUT (OSC0_STARTUP_TIMEOUT*(1000000/OSC_RCSYS_NOMINAL_HZ)) |
Number of us to wait for USB clock to start.
|
inlinestatic |
Disable a module clock derived from the CPU clock.
module_index | Index of the module clock in the CPUMASK register |
References PM_CLK_GRP_CPU, and sysclk_priv_disable_module().
|
inlinestatic |
Disable a module clock derived from the HSB clock.
module_index | Index of the module clock in the HSBMASK register |
References PM_CLK_GRP_HSB, and sysclk_priv_disable_module().
Referenced by sysclk_disable_pba_module(), sysclk_disable_pbb_module(), and sysclk_disable_peripheral_clock().
|
inlinestatic |
Disable divided clock mask derived from the PBA clock.
mask | mask of the divided clock in the PBADIVMASK register |
Referenced by sysclk_disable_peripheral_clock().
void sysclk_disable_pba_module | ( | uint32_t | module_index | ) |
Disable a module clock derived from the PBA clock.
module_index | Index of the module clock in the PBAMASK register |
References cpu_irq_restore(), cpu_irq_save(), PM_CLK_GRP_PBA, sysclk_disable_hsb_module(), SYSCLK_PBA_BRIDGE, and sysclk_priv_disable_module().
Referenced by sysclk_disable_peripheral_clock().
void sysclk_disable_pbb_module | ( | uint32_t | module_index | ) |
Disable a module clock derived from the PBB clock.
module_index | Index of the module clock in the PBBMASK register |
References cpu_irq_restore(), cpu_irq_save(), PM_CLK_GRP_PBB, sysclk_disable_hsb_module(), SYSCLK_PBB_BRIDGE, and sysclk_priv_disable_module().
Referenced by sysclk_disable_peripheral_clock().
|
inlinestatic |
Disable a module clock derived from the PBC clock.
module_index | Index of the module clock in the PBAMASK register |
References PM_CLK_GRP_PBC, and sysclk_priv_disable_module().
Referenced by sysclk_disable_peripheral_clock().
|
inlinestatic |
Disable a module clock derived from the PBD clock.
module_index | Index of the module clock in the PBAMASK register |
References PM_CLK_GRP_PBD, and sysclk_priv_disable_module().
Referenced by sysclk_disable_peripheral_clock().
void sysclk_disable_peripheral_clock | ( | const volatile void * | module | ) |
Disable a peripheral's clock from its base address.
Disables the clock to a peripheral, given its base address. If the peripheral has an associated clock on the HSB bus, this will be disabled also.
module | Pointer to the module's base address. |
References Assert, PBA_DIVMASK_Msk, PBADIV_CLKSRC_MASK, SYSCLK_ABDACB, SYSCLK_ACIFC, SYSCLK_ADCIFE, SYSCLK_AESA_HSB, SYSCLK_AST, SYSCLK_BPM, SYSCLK_BSCIF, SYSCLK_CATB, SYSCLK_CHIPID, SYSCLK_CRCCU_DATA, SYSCLK_CRCCU_REGS, SYSCLK_DACC, sysclk_disable_hsb_module(), sysclk_disable_pba_divmask(), sysclk_disable_pba_module(), sysclk_disable_pbb_module(), sysclk_disable_pbc_module(), sysclk_disable_pbd_module(), SYSCLK_EIC, SYSCLK_FREQM, SYSCLK_GLOC, SYSCLK_GPIO, SYSCLK_HFLASHC_REGS, SYSCLK_HMATRIX, SYSCLK_HRAMC1_DATA, SYSCLK_HRAMC1_REGS, SYSCLK_IISC, SYSCLK_LCDCA, SYSCLK_PARC, SYSCLK_PDCA_HSB, SYSCLK_PDCA_PB, SYSCLK_PEVC, SYSCLK_PICOUART, SYSCLK_PM, SYSCLK_SCIF, SYSCLK_SPI, SYSCLK_TC0, SYSCLK_TC1, SYSCLK_TRNG, SYSCLK_TWIM0, SYSCLK_TWIM1, SYSCLK_TWIM2, SYSCLK_TWIM3, SYSCLK_TWIS0, SYSCLK_TWIS1, SYSCLK_USART0, SYSCLK_USART1, SYSCLK_USART2, SYSCLK_USART3, SYSCLK_USBC_DATA, SYSCLK_USBC_REGS, and SYSCLK_WDT.
Referenced by abdac_init(), adc_disable(), adc_init(), aes_disable(), aes_init(), app_init_lowpower(), ast_disable(), eic5_callback(), eic_callback(), eic_disable(), event_button_init(), events_disable(), flashcalw_picocache_disable(), freqm_disable(), generate_crc(), gloc_disable(), hmatrix_disable(), pdca_disable(), picouart_disable(), picouart_set_config(), spi_disable_clock(), ui_bm_init(), ui_bm_send_mcu_status(), wdt_disable(), and wdt_init().
void sysclk_disable_usb | ( | void | ) |
Disable the USB generic clock.
References genclk_disable().
Referenced by otg_dual_disable(), and udd_disable().
|
inlinestatic |
Enable a module clock derived from the CPU clock.
module_index | Index of the module clock in the CPUMASK register |
References PM_CLK_GRP_CPU, and sysclk_priv_enable_module().
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inlinestatic |
Enable a module clock derived from the HSB clock.
module_index | Index of the module clock in the HSBMASK register |
References PM_CLK_GRP_HSB, and sysclk_priv_enable_module().
Referenced by main(), sysclk_enable_pba_module(), sysclk_enable_pbb_module(), sysclk_enable_peripheral_clock(), and sysclk_enable_usb().
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inlinestatic |
Enable divided clock mask derived from the PBA clock.
mask | mask of the divided clock in the PBADIVMASK register |
Referenced by sysclk_enable_peripheral_clock().
void sysclk_enable_pba_module | ( | uint32_t | module_index | ) |
Enable a module clock derived from the PBA clock.
module_index | Index of the module clock in the PBAMASK register |
References cpu_irq_restore(), cpu_irq_save(), PM_CLK_GRP_PBA, sysclk_enable_hsb_module(), SYSCLK_PBA_BRIDGE, and sysclk_priv_enable_module().
Referenced by sysclk_enable_peripheral_clock().
void sysclk_enable_pbb_module | ( | uint32_t | module_index | ) |
Enable a module clock derived from the PBB clock.
module_index | Index of the module clock in the PBBMASK register |
References cpu_irq_restore(), cpu_irq_save(), PM_CLK_GRP_PBB, sysclk_enable_hsb_module(), SYSCLK_PBB_BRIDGE, and sysclk_priv_enable_module().
Referenced by sysclk_enable_peripheral_clock(), and sysclk_enable_usb().
|
inlinestatic |
Enable a module clock derived from the PBC clock.
module_index | Index of the module clock in the PBAMASK register |
References PM_CLK_GRP_PBC, and sysclk_priv_enable_module().
Referenced by sysclk_enable_peripheral_clock().
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inlinestatic |
Enable a module clock derived from the PBD clock.
module_index | Index of the module clock in the PBAMASK register |
References PM_CLK_GRP_PBD, and sysclk_priv_enable_module().
Referenced by sysclk_enable_peripheral_clock().
void sysclk_enable_peripheral_clock | ( | const volatile void * | module | ) |
Enable a peripheral's clock from its base address.
Enables the clock to a peripheral, given its base address. If the peripheral has an associated clock on the HSB bus, this will be enabled also.
module | Pointer to the module's base address. |
References Assert, PBA_DIVMASK_CLK_USART, PBA_DIVMASK_TIMER_CLOCK2, PBA_DIVMASK_TIMER_CLOCK3, PBA_DIVMASK_TIMER_CLOCK4, PBA_DIVMASK_TIMER_CLOCK5, SYSCLK_ABDACB, SYSCLK_ACIFC, SYSCLK_ADCIFE, SYSCLK_AESA_HSB, SYSCLK_AST, SYSCLK_BPM, SYSCLK_BSCIF, SYSCLK_CATB, SYSCLK_CHIPID, SYSCLK_CRCCU_DATA, SYSCLK_CRCCU_REGS, SYSCLK_DACC, SYSCLK_EIC, sysclk_enable_hsb_module(), sysclk_enable_pba_divmask(), sysclk_enable_pba_module(), sysclk_enable_pbb_module(), sysclk_enable_pbc_module(), sysclk_enable_pbd_module(), SYSCLK_FREQM, SYSCLK_GLOC, SYSCLK_GPIO, SYSCLK_HFLASHC_DATA, SYSCLK_HFLASHC_REGS, SYSCLK_HMATRIX, SYSCLK_HRAMC1_DATA, SYSCLK_HRAMC1_REGS, SYSCLK_IISC, SYSCLK_LCDCA, SYSCLK_PARC, SYSCLK_PDCA_HSB, SYSCLK_PDCA_PB, SYSCLK_PEVC, SYSCLK_PICOUART, SYSCLK_PM, SYSCLK_SCIF, SYSCLK_SPI, SYSCLK_TC0, SYSCLK_TC1, SYSCLK_TRNG, SYSCLK_TWIM0, SYSCLK_TWIM1, SYSCLK_TWIM2, SYSCLK_TWIM3, SYSCLK_TWIS0, SYSCLK_TWIS1, SYSCLK_USART0, SYSCLK_USART1, SYSCLK_USART2, SYSCLK_USART3, SYSCLK_USBC_DATA, SYSCLK_USBC_REGS, and SYSCLK_WDT.
void sysclk_enable_usb | ( | void | ) |
Enable the USB generic clock.
References CONFIG_USBCLK_DIV, CONFIG_USBCLK_SOURCE, genclk_enable_config(), sysclk_enable_hsb_module(), sysclk_enable_pbb_module(), SYSCLK_USBC_DATA, and SYSCLK_USBC_REGS.
Referenced by otg_dual_enable(), and udd_enable().
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inlinestatic |
Return the current rate in Hz of the CPU clock.
References CONFIG_SYSCLK_CPU_DIV, and sysclk_get_main_hz().
Referenced by configure_systick(), configure_tc(), main(), run_ps_test(), run_sync_clock_test(), sysclk_init(), time_tick_init(), and wdt_set_ctrl().
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inlinestatic |
Return the current rate in Hz of the High-Speed Bus clock.
References CONFIG_SYSCLK_CPU_DIV, and sysclk_get_main_hz().
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inlinestatic |
Return the current rate in Hz of the main system clock.
References CONFIG_RCFAST_FRANGE, CONFIG_SYSCLK_SOURCE, dfll_get_default_rate, OSC_RC1M_NOMINAL_HZ, OSC_RC80M_NOMINAL_HZ, OSC_RCFAST12M_NOMINAL_HZ, OSC_RCFAST4M_NOMINAL_HZ, OSC_RCFAST8M_NOMINAL_HZ, OSC_RCSYS_NOMINAL_HZ, pll_get_default_rate, SYSCLK_SRC_DFLL, SYSCLK_SRC_OSC0, SYSCLK_SRC_PLL0, SYSCLK_SRC_RC1M, SYSCLK_SRC_RC80M, SYSCLK_SRC_RCFAST, and SYSCLK_SRC_RCSYS.
Referenced by sysclk_get_cpu_hz(), sysclk_get_hsb_hz(), sysclk_get_pba_hz(), sysclk_get_pbb_hz(), sysclk_get_pbc_hz(), and sysclk_get_pbd_hz().
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inlinestatic |
Return the current rate in Hz of the Peripheral Bus A clock.
References CONFIG_SYSCLK_PBA_DIV, and sysclk_get_main_hz().
Referenced by run_spi_trans_test(), run_sync_clock_test(), spi_master_initialize(), spi_master_setup_device(), sysclk_get_peripheral_bus_hz(), twi_master_setup(), and usart_spi_setup_device().
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inlinestatic |
Return the current rate in Hz of the Peripheral Bus B clock.
References CONFIG_SYSCLK_PBB_DIV, and sysclk_get_main_hz().
Referenced by run_sync_clock_test(), and sysclk_get_peripheral_bus_hz().
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inlinestatic |
Return the current rate in Hz of the Peripheral Bus C clock.
References CONFIG_SYSCLK_PBC_DIV, and sysclk_get_main_hz().
Referenced by run_sync_clock_test(), and sysclk_get_peripheral_bus_hz().
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inlinestatic |
Return the current rate in Hz of the Peripheral Bus D clock.
References CONFIG_SYSCLK_PBD_DIV, and sysclk_get_main_hz().
Referenced by run_sync_clock_test(), and sysclk_get_peripheral_bus_hz().
uint32_t sysclk_get_peripheral_bus_hz | ( | const volatile void * | module | ) |
Retrieves the current rate in Hz of the Peripheral Bus clock attached to the specified peripheral.
module | Pointer to the module's base address. |
References Assert, sysclk_get_pba_hz(), sysclk_get_pbb_hz(), sysclk_get_pbc_hz(), and sysclk_get_pbd_hz().
Referenced by configure_tc(), configure_usart(), init_test(), main(), tc_waveform_initialize(), tmr_init(), uart_config(), uart_open(), and usart_serial_init().
void sysclk_init | ( | void | ) |
Initialize the synchronous clock system.
This function will initialize the system clock and its source. This includes:
Since all non-essential peripheral clocks are initially disabled, it is the responsibility of the peripheral driver to re-enable any clocks that are needed for normal operation.
References Assert, bpm_configure_power_scaling(), bpm_enable_fast_wakeup(), bpm_get_status(), BPM_PS_0, BPM_PS_1, BPM_PS_2, BPM_PSCM_CPU_NOT_HALT, CONFIG_SYSCLK_CPU_DIV, CONFIG_SYSCLK_INIT_CPUMASK, CONFIG_SYSCLK_INIT_HSBMASK, CONFIG_SYSCLK_INIT_PBAMASK, CONFIG_SYSCLK_INIT_PBBMASK, CONFIG_SYSCLK_INIT_PBCMASK, CONFIG_SYSCLK_INIT_PBDMASK, CONFIG_SYSCLK_PBA_DIV, CONFIG_SYSCLK_PBB_DIV, CONFIG_SYSCLK_PBC_DIV, CONFIG_SYSCLK_PBD_DIV, CONFIG_SYSCLK_SOURCE, cpu_irq_restore(), cpu_irq_save(), dfll_enable_config_defaults(), FLASH_FREQ_PS1_FWS_0_MAX_FREQ, FLASH_FREQ_PS1_FWS_1_MAX_FREQ, flash_set_bus_freq, osc_enable(), OSC_ID_OSC0, OSC_ID_RC1M, OSC_ID_RC80M, OSC_ID_RCFAST, osc_wait_ready(), pll_enable_config_defaults(), sysclk_enable_peripheral_clock(), sysclk_get_cpu_hz(), SYSCLK_INIT_MINIMAL_CPUMASK, SYSCLK_INIT_MINIMAL_HSBMASK, SYSCLK_INIT_MINIMAL_PBAMASK, SYSCLK_INIT_MINIMAL_PBBMASK, SYSCLK_INIT_MINIMAL_PBCMASK, SYSCLK_INIT_MINIMAL_PBDMASK, sysclk_set_prescalers(), sysclk_set_source(), SYSCLK_SRC_DFLL, SYSCLK_SRC_OSC0, SYSCLK_SRC_PLL0, SYSCLK_SRC_RC1M, SYSCLK_SRC_RC80M, SYSCLK_SRC_RCFAST, and SYSCLK_SRC_RCSYS.
Referenced by app_init(), bootloader_system_init(), firmware_gen_system_init(), main(), and run_sync_clock_test().
void sysclk_priv_disable_module | ( | uint32_t | bus_id, |
uint32_t | module_index | ||
) |
Disable a maskable module clock.
bus_id | Bus index, given by the PM_CLK_GRP_xxx definitions. |
module_index | Index of the module to be disabled. This is the bit number in the corresponding xxxMASK register. |
References cpu_irq_restore(), and cpu_irq_save().
Referenced by sysclk_disable_cpu_module(), sysclk_disable_hsb_module(), sysclk_disable_pba_module(), sysclk_disable_pbb_module(), sysclk_disable_pbc_module(), and sysclk_disable_pbd_module().
void sysclk_priv_enable_module | ( | uint32_t | bus_id, |
uint32_t | module_index | ||
) |
Enable a maskable module clock.
bus_id | Bus index, given by the PM_CLK_GRP_xxx definitions. |
module_index | Index of the module to be enabled. This is the bit number in the corresponding xxxMASK register. |
References cpu_irq_restore(), and cpu_irq_save().
Referenced by sysclk_enable_cpu_module(), sysclk_enable_hsb_module(), sysclk_enable_pba_module(), sysclk_enable_pbb_module(), sysclk_enable_pbc_module(), and sysclk_enable_pbd_module().
void sysclk_set_prescalers | ( | uint32_t | cpu_shift, |
uint32_t | pba_shift, | ||
uint32_t | pbb_shift, | ||
uint32_t | pbc_shift, | ||
uint32_t | pbd_shift | ||
) |
Set system clock prescaler configuration.
This function will change the system clock prescaler configuration to match the parameters.
cpu_shift | The CPU clock will be divided by \(2^{cpu\_shift}\) |
pba_shift | The PBA clock will be divided by \(2^{pba\_shift}\) |
pbb_shift | The PBB clock will be divided by \(2^{pbb\_shift}\) |
pbc_shift | The PBC clock will be divided by \(2^{pbc\_shift}\) |
pbd_shift | The PBD clock will be divided by \(2^{pbd\_shift}\) |
References Assert, cpu_irq_restore(), and cpu_irq_save().
Referenced by main(), run_iis_test(), and sysclk_init().
void sysclk_set_source | ( | uint32_t | src | ) |
Change the source of the main system clock.
src | The new system clock source. Must be one of the constants from the System Clock Sources section. |
References Assert, cpu_irq_restore(), cpu_irq_save(), and SYSCLK_SRC_RC1M.
Referenced by main(), run_iis_test(), and sysclk_init().