Driver for the TWIM (Two-Wire Master Interface).
This driver provides access to the main features of the TWIM controller. The TWIM interconnects components on a unique two-wire bus. The TWIM is programmable as a master with sequential or single-byte access. Multiple master capability is supported.
Modules | |
| Related Project(s) | |
| In this section you can find all the projects related to the TWI - Two-Wire Master Interface. | |
Data Structures | |
| struct | twim_options_t |
| Input parameters when initializing the twim module mode. More... | |
| struct | twim_package_t |
| Information concerning the data transmission. More... | |
| struct | twim_transfer_t |
| Information concerning the data transmission. More... | |
Macros | |
| #define | AVR32_TWIM_IER_NAK_MASK |
| Interrupt Enable Register Mask for No Acknowledgements. More... | |
| #define | AVR32_TWIM_IER_STD_MASK |
| Frequently used Interrupt Enable Register Mask. More... | |
| #define | AVR32_TWIM_SCR_NAK_MASK |
| Status Clear Register Mask for No Acknowledgements. More... | |
| #define | AVR32_TWIM_SR_NAK_MASK |
| Status Register Mask for No Acknowledgements. More... | |
| #define | AVR32_TWIM_SR_STD_MASK |
| Frequently used Status Clear Register Mask. More... | |
| #define | TWI_FAST_MODE_SPEED (400000 /* kbit/s */) |
| TWI Fast Mode. More... | |
| #define | TWI_STD_MODE_SPEED (100000 /* kbit/s */) |
Functions | |
| static status_code_t | twi_master_read (volatile avr32_twi_t *twim, const twi_package_t *package) |
| Compatibility with TWI Module driver for read operation. More... | |
| static status_code_t | twi_master_write (volatile avr32_twi_t *twim, const twi_package_t *package) |
| Compatibility with TWI Module drivers for write operation. More... | |
| status_code_t | twim_chained_transfer (volatile avr32_twim_t *twim, volatile twim_transfer_t *first, volatile twim_transfer_t *second, bool tenbit) |
| Perform Chained transfers to a TWI compatible slave device. More... | |
| void | twim_disable_interrupt (volatile avr32_twim_t *twim) |
| Disable the TWI interrupts and clear its status register. More... | |
| static void | twim_master_disable (volatile avr32_twim_t *twim) |
| Disable Master Mode of the TWI. More... | |
| static void | twim_master_enable (volatile avr32_twim_t *twim) |
| Enable Master Mode of the TWI. More... | |
| status_code_t | twim_master_init (volatile avr32_twim_t *twim, const twim_options_t *opt) |
| Initialize the twi master module. More... | |
| status_code_t | twim_probe (volatile avr32_twim_t *twim, uint32_t chip_addr) |
| Test if a chip answers for a given twi address. More... | |
| status_code_t | twim_read (volatile avr32_twim_t *twim, uint8_t *buffer, uint32_t nbytes, uint32_t saddr, bool tenbit) |
| Read multiple bytes from a TWI compatible slave device. More... | |
| status_code_t | twim_read_packet (volatile avr32_twim_t *twim, const twim_package_t *package) |
| Read multiple bytes from a TWI compatible slave device. More... | |
| status_code_t | twim_set_speed (volatile avr32_twim_t *twim, uint32_t speed, uint32_t pba_hz) |
| Set the twim bus speed in conjunction with the clock frequency. More... | |
| uint8_t | twim_status (void) |
| Information about the current status of the TWI Bus. More... | |
| status_code_t | twim_write (volatile avr32_twim_t *twim, const uint8_t *buffer, uint32_t nbytes, uint32_t saddr, bool tenbit) |
| Write multiple bytes to a TWI compatible slave device. More... | |
| status_code_t | twim_write_packet (volatile avr32_twim_t *twim, const twim_package_t *package) |
| Write multiple bytes to a TWI compatible slave device. More... | |
TWI Driver Compatibility | |
Codes for UC3 devices using TWI modules can easily be ported to UC3 devices with TWIM module | |
| #define | avr32_twi_t avr32_twim_t |
| #define | twi_options_t twim_options_t |
| #define | twi_package_t twim_package_t |
| #define | twi_master_init twim_master_init |
| #define | twi_probe twim_probe |
| enum | twim_transfer_status { TWI_SUCCESS = 0, TWI_INVALID_ARGUMENT = -1, TWI_ARBITRATION_LOST = -2, TWI_NO_CHIP_FOUND = -3, TWI_RECEIVE_NACK = -4, TWI_SEND_NACK = -5, TWI_INVALID_CLOCK_DIV = -6 } |
| Status Codes for TWI Transfer. More... | |
| typedef enum twim_transfer_status | twim_transfer_status_t |
| #define avr32_twi_t avr32_twim_t |
| #define AVR32_TWIM_IER_NAK_MASK |
Interrupt Enable Register Mask for No Acknowledgements.
Referenced by ISR(), and twim_write().
| #define AVR32_TWIM_IER_STD_MASK |
Frequently used Interrupt Enable Register Mask.
Referenced by twim_read(), twim_read_packet(), and twim_write_packet().
| #define AVR32_TWIM_SCR_NAK_MASK |
Status Clear Register Mask for No Acknowledgements.
Referenced by twim_chained_transfer().
| #define AVR32_TWIM_SR_NAK_MASK |
Status Register Mask for No Acknowledgements.
Referenced by twim_chained_transfer().
| #define AVR32_TWIM_SR_STD_MASK |
Frequently used Status Clear Register Mask.
Referenced by ISR().
| #define TWI_FAST_MODE_SPEED (400000 /* kbit/s */) |
TWI Fast Mode.
| #define twi_master_init twim_master_init |
Referenced by controller_twi_init(), twi_init(), and twi_master_setup().
| #define twi_options_t twim_options_t |
Referenced by controller_twi_init(), twi_init(), and twim_init().
| #define twi_package_t twim_package_t |
Referenced by at24cxx_read_byte(), at24cxx_read_continuous(), at24cxx_write_byte(), at24cxx_write_continuous(), at42qt1060_get_status(), at42qt1060_read_reg(), at42qt1060_write_reg(), main(), mxt_get_crc_value(), mxt_get_message_count(), mxt_probe_device(), mxt_read_config_object(), mxt_read_config_reg(), mxt_read_id_block(), mxt_read_message(), mxt_read_object_table(), mxt_write_config_object(), mxt_write_config_reg(), qt_read_regs(), and qt_write_regs().
| #define twi_probe twim_probe |
| #define TWI_STD_MODE_SPEED (100000 /* kbit/s */) |
TWI Standard Mode
| typedef enum twim_transfer_status twim_transfer_status_t |
| enum twim_transfer_status |
Status Codes for TWI Transfer.
|
inlinestatic |
Compatibility with TWI Module driver for read operation.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM). |
| package | Package information and data (see twim_package_t) |
References twim_read_packet().
Referenced by at24cxx_read_byte(), at24cxx_read_continuous(), at42qt1060_get_status(), at42qt1060_read_reg(), main(), mxt_get_crc_value(), mxt_get_message_count(), mxt_probe_device(), mxt_read_config_object(), mxt_read_config_reg(), mxt_read_id_block(), mxt_read_message(), mxt_read_object_table(), and qt_read_regs().
|
inlinestatic |
Compatibility with TWI Module drivers for write operation.
| twim | Base address of the TWIM (i.e. &AVR32_TWI). |
| *package | Package information and data (see twim_package_t) |
References twim_write_packet().
Referenced by at24cxx_read_byte(), at24cxx_read_continuous(), at24cxx_write_byte(), at24cxx_write_continuous(), at42qt1060_read_reg(), at42qt1060_write_reg(), main(), mxt_write_config_object(), mxt_write_config_reg(), qt_read_regs(), and qt_write_regs().
| status_code_t twim_chained_transfer | ( | volatile avr32_twim_t * | twim, |
| volatile twim_transfer_t * | first, | ||
| volatile twim_transfer_t * | second, | ||
| bool | tenbit | ||
| ) |
Perform Chained transfers to a TWI compatible slave device.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM) |
| *first | Information regarding first transfer |
| *second | Information regarding second transfer (see twim_transfer_t) |
| tenbit | To enable tenbit addressing |
| STATUS_OK | Chain transfer successful |
| ERR_IO_ERROR | NACK received or Bus Arbitration lost |
References AVR32_TWIM_SCR_NAK_MASK, AVR32_TWIM_SR_NAK_MASK, twim_transfer_t::buffer, twim_transfer_t::chip, cpu_relax, ERR_IO_ERROR, twim_transfer_t::length, twim_transfer_t::read, STATUS_OK, transfer_status, TWI_SUCCESS, twim_disable_interrupt(), twim_inst, twim_next, twim_rx_data, twim_tx_data, and twim_tx_nb_bytes.
| void twim_disable_interrupt | ( | volatile avr32_twim_t * | twim | ) |
Disable the TWI interrupts and clear its status register.
| twim | Base address of the TWIM (i.e. &AVR32_TWI). |
References cpu_irq_disable, and cpu_irq_is_enabled.
Referenced by twim_chained_transfer(), twim_read(), twim_read_packet(), twim_write(), and twim_write_packet().
|
inlinestatic |
Disable Master Mode of the TWI.
| twim | Base address of the TWI instance. |
|
inlinestatic |
Enable Master Mode of the TWI.
| twim | Base address of the TWI instance. |
| status_code_t twim_master_init | ( | volatile avr32_twim_t * | twim, |
| const twim_options_t * | opt | ||
| ) |
Initialize the twi master module.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM) |
| *opt | Options for initializing the twim module (see twim_options_t) |
| STATUS_OK | Transaction is successful |
| ERR_INVALID_ARG | Invalid arg resulting in wrong CWGR Exponential |
| ERR_IO_ERROR | NACK is received or Bus Arbitration lost |
References twim_options_t::chip, CONF_TWIM_IRQ_LEVEL, CONF_TWIM_IRQ_LINE, cpu_irq_disable, cpu_irq_enable, cpu_irq_is_enabled, cpu_irq_restore(), cpu_irq_save(), ERR_INVALID_ARG, ERR_IO_ERROR, irq_register_handler, twim_options_t::pba_hz, twim_options_t::smbus, twim_options_t::speed, STATUS_OK, transfer_status, TWI_ARBITRATION_LOST, TWI_RECEIVE_NACK, TWI_SUCCESS, twim_probe(), and twim_set_speed().
Referenced by twim_init().
| status_code_t twim_probe | ( | volatile avr32_twim_t * | twim, |
| uint32_t | chip_addr | ||
| ) |
Test if a chip answers for a given twi address.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM) |
| chip_addr | Address of the chip which is searched for |
| STATUS_OK | Slave Found |
| ERR_IO_ERROR | ANAK received or Bus Arbitration lost |
References data, and twim_write().
Referenced by twim_master_init().
| status_code_t twim_read | ( | volatile avr32_twim_t * | twim, |
| uint8_t * | buffer, | ||
| uint32_t | nbytes, | ||
| uint32_t | saddr, | ||
| bool | tenbit | ||
| ) |
Read multiple bytes from a TWI compatible slave device.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM) |
| *buffer | Received data |
| nbytes | Number of bytes to be transmitted |
| saddr | Slave address |
| tenbit | Ten bit addressing |
| STATUS_OK | If all bytes were read successfully |
| ERR_IO_ERROR | NACK received or Bus Arbitration lost |
References AVR32_TWIM_IER_STD_MASK, buffer, cpu_irq_enable, cpu_relax, ERR_IO_ERROR, STATUS_OK, transfer_status, TWI_ARBITRATION_LOST, TWI_RECEIVE_NACK, TWI_SUCCESS, twim_disable_interrupt(), twim_inst, twim_it_mask, twim_next, twim_rx_data, twim_rx_nb_bytes, and twim_status().
| status_code_t twim_read_packet | ( | volatile avr32_twim_t * | twim, |
| const twim_package_t * | package | ||
| ) |
Read multiple bytes from a TWI compatible slave device.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM) |
| package | Package information and data (see twim_package_t) |
| STATUS_OK | If all bytes were read successfully |
| ERR_IO_ERROR | NACK received or Bus Arbitration lost |
References twim_package_t::addr, twim_package_t::addr_length, AVR32_TWIM_IER_STD_MASK, twim_package_t::buffer, twim_package_t::chip, cpu_irq_enable, cpu_relax, ERR_IO_ERROR, twim_package_t::length, STATUS_OK, transfer_status, TWI_ARBITRATION_LOST, TWI_RECEIVE_NACK, TWI_SUCCESS, twim_disable_interrupt(), twim_inst, twim_it_mask, twim_next, twim_rx_data, twim_rx_nb_bytes, twim_status(), twim_tx_data, and twim_tx_nb_bytes.
Referenced by twi_master_read().
| status_code_t twim_set_speed | ( | volatile avr32_twim_t * | twim, |
| uint32_t | speed, | ||
| uint32_t | pba_hz | ||
| ) |
Set the twim bus speed in conjunction with the clock frequency.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM). |
| speed | The desired twim bus speed |
| pba_hz | The current running PBA clock frequency |
| STATUS_OK | Transaction is successful |
| ERR_INVALID_ARG | Invalid arg resulting in wrong CWGR Exponential |
References ERR_INVALID_ARG, and STATUS_OK.
Referenced by twim_master_init().
| uint8_t twim_status | ( | void | ) |
Information about the current status of the TWI Bus.
References status, and twim_inst.
Referenced by twim_read(), twim_read_packet(), twim_write(), and twim_write_packet().
| status_code_t twim_write | ( | volatile avr32_twim_t * | twim, |
| uint8_t const * | buffer, | ||
| uint32_t | nbytes, | ||
| uint32_t | saddr, | ||
| bool | tenbit | ||
| ) |
Write multiple bytes to a TWI compatible slave device.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM). |
| *buffer | Data to be transmitted |
| nbytes | Number of bytes to be transmitted |
| saddr | Slave address |
| tenbit | Ten bit addressing |
| STATUS_OK | If all bytes were send successfully |
| ERR_IO_ERROR | NACK received or Bus Arbitration lost |
References AVR32_TWIM_IER_NAK_MASK, buffer, cpu_irq_enable, cpu_relax, ERR_IO_ERROR, STATUS_OK, transfer_status, TWI_ARBITRATION_LOST, TWI_RECEIVE_NACK, TWI_SUCCESS, twim_disable_interrupt(), twim_inst, twim_it_mask, twim_next, twim_status(), twim_tx_data, and twim_tx_nb_bytes.
Referenced by twim_probe().
| status_code_t twim_write_packet | ( | volatile avr32_twim_t * | twim, |
| const twim_package_t * | package | ||
| ) |
Write multiple bytes to a TWI compatible slave device.
| twim | Base address of the TWIM (i.e. &AVR32_TWIM) |
| *package | Package information and data (see twim_package_t) |
| STATUS_OK | If all bytes were send successfully |
| ERR_IO_ERROR | NACK received or Bus Arbitration lost |
References twim_package_t::addr, twim_package_t::addr_length, AVR32_TWIM_IER_STD_MASK, twim_package_t::buffer, twim_package_t::chip, cpu_irq_enable, cpu_relax, ERR_IO_ERROR, twim_package_t::length, STATUS_OK, transfer_status, TWI_ARBITRATION_LOST, TWI_RECEIVE_NACK, TWI_SUCCESS, twim_disable_interrupt(), twim_inst, twim_it_mask, twim_next, twim_status(), twim_tx_data, and twim_tx_nb_bytes.
Referenced by twi_master_write().
1.8.5