Bosch BMA020 3-axis accelerometer.
This file contains functions for initializing and reading data from a Bosch BMA020 3-axis accelerometer.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
#include <asf.h>
Macros | |
#define | BMA020_DATA_RESOLUTION (10) |
#define | BMA020_DATA_SHIFT_RIGHT (6) |
#define | BMA020_SPI_MODE (3) |
#define | BMA020_TWI_ADDR (0x38) |
#define | BMA020_CHIP_ID (0x00) /* chip ID - always 0x02 */ |
BMA020 Register Addresses. More... | |
#define | BMA020_CHIP_VERSION (0x01) /* chip revision */ |
#define | BMA020_ACC_X_LSB (0x02) /* X accel - LSB + new data */ |
#define | BMA020_ACC_X_MSB (0x03) /* X accel - MSB */ |
#define | BMA020_ACC_Y_LSB (0x04) /* Y accel - LSB + new data */ |
#define | BMA020_ACC_Y_MSB (0x05) /* Y accel - MSB */ |
#define | BMA020_ACC_Z_LSB (0x06) /* Z accel - LSB + new data */ |
#define | BMA020_ACC_Z_MSB (0x07) /* Z accel - MSB */ |
#define | BMA020_STATUS1 (0x09) /* device status register 1 */ |
#define | BMA020_CTRL1 (0x0a) /* device control 1 */ |
#define | BMA020_CTRL2 (0x0b) /* device control 2 */ |
#define | BMA020_LG_THRES (0x0c) /* low g threshold */ |
#define | BMA020_LG_DUR (0x0d) /* low g duration */ |
#define | BMA020_HG_THRES (0x0e) /* high g threshold */ |
#define | BMA020_HG_DUR (0x0f) /* high g duration */ |
#define | BMA020_ANY_MOTION_THRES (0x10) /* any motion threshold */ |
#define | BMA020_CTRL3 (0x11) /* motion duration & g-hysteresis */ |
#define | BMA020_CUST1 (0x12) /* customer reserved reg 1 */ |
#define | BMA020_CUST2 (0x13) /* customer reserved reg 2 */ |
#define | BMA020_CTRL4 (0x14) /* range & bandwidth */ |
#define | BMA020_CTRL5 (0x15) /* interrupt & wake control */ |
#define | BMA020_ID_VAL (0x02) /* BMA020 chip id value */ |
BMA020 Register Bit Definitions. More... | |
#define | ACC_NEW_DATA (0x01) /* new data available */ |
#define | ACC_LSB_0_1 (0xc0) /* bits 0 and 1 of accel reading */ |
#define | STATUS1_HG (0x01) /* high-g currently detected */ |
#define | STATUS1_LG (0x02) /* low-g currently detected */ |
#define | STATUS1_HG_LATCHED (0x04) /* high-g event detected */ |
#define | STATUS1_LG_LATCHED (0x08) /* low-g event detected */ |
#define | CTRL1_SLEEP (0x01) /* enter sleep mode */ |
#define | CTRL1_SOFT_RESET (0x02) /* reset device */ |
#define | CTRL1_SELF_TEST_0 (0x04) /* perform self test 0 */ |
#define | CTRL1_SELF_TEST_1 (0x08) /* perform self test 1 */ |
#define | CTRL1_RESET_INT (0x40) /* reset interrupt */ |
#define | CTRL2_ENABLE_LG (0x01) /* enable low g interrupt */ |
#define | CTRL2_ENABLE_HG (0x02) /* enable high g interrupt */ |
#define | CTRL2_COUNTER_LG (0x0c) /* low g int count (2 bits) */ |
#define | CTRL2_COUNTER_HG (0x30) /* high g int count (2 bits) */ |
#define | CTRL2_ANY_MOTION (0x40) /* enable any-motion interrupt */ |
#define | CTRL2_ALERT (0x80) /* enable any-motion alert mode */ |
#define | CTRL3_LG_HYST (0x07) /* low g hysteresis (3 bits) */ |
#define | CTRL3_HG_HYST (0x28) /* high g hysteresis (3 bits) */ |
#define | CTRL3_ANY_MOTION_DUR (0xc0) /* any motion duration (2 bits) */ |
#define | CTRL4_BANDWIDTH (0x07) /* bandwidth (3 bits) */ |
#define | BANDWIDTH_25HZ (0x00) /* 25 Hz */ |
#define | BANDWIDTH_50HZ (0x01) /* 50 Hz */ |
#define | BANDWIDTH_100HZ (0x02) /* 100 Hz */ |
#define | BANDWIDTH_190HZ (0x03) /* 190 Hz */ |
#define | BANDWIDTH_375HZ (0x04) /* 375 Hz */ |
#define | BANDWIDTH_750HZ (0x05) /* 750 Hz */ |
#define | BANDWIDTH_1500HZ (0x06) /* 1500 Hz */ |
#define | CTRL4_RANGE (0x18) /* range (2 bits) */ |
#define | RANGE_2G (0x00) /* +/- 2g */ |
#define | RANGE_4G (0x08) /* +/- 4g */ |
#define | RANGE_8G (0x10) /* +/- 8g */ |
#define | CTRL5_WAKE_UP (0x01) /* enable automatic wake up */ |
#define | CTRL5_WAKE_UP_PAUSE (0x06) /* duration between wakes, 2bits */ |
#define | CTRL5_SHADOW_DIS (0x08) /* disable lsb/msb read blocking */ |
#define | CTRL5_LATCH_INT (0x10) /* latch interrupts until reset */ |
#define | CTRL5_NEW_DATA_INT (0x20) /* enable new data interrupt */ |
#define | CTRL5_ENABLE_ADV_INT (0x40) /* enable advanced interrupts */ |
#define | CTRL5_SPI4 (0x80) /* SPI uses 4-wire interface */ |
Functions | |
bool | bma020_init (sensor_t *, int) |
Bosch BMA020 accelerometer driver initialization. More... | |
#define ACC_LSB_0_1 (0xc0) /* bits 0 and 1 of accel reading */ |
#define ACC_NEW_DATA (0x01) /* new data available */ |
#define BANDWIDTH_100HZ (0x02) /* 100 Hz */ |
#define BANDWIDTH_1500HZ (0x06) /* 1500 Hz */ |
#define BANDWIDTH_190HZ (0x03) /* 190 Hz */ |
#define BANDWIDTH_25HZ (0x00) /* 25 Hz */ |
#define BANDWIDTH_375HZ (0x04) /* 375 Hz */ |
#define BANDWIDTH_50HZ (0x01) /* 50 Hz */ |
#define BANDWIDTH_750HZ (0x05) /* 750 Hz */ |
#define BMA020_ACC_X_LSB (0x02) /* X accel - LSB + new data */ |
Referenced by bma020_init().
#define BMA020_ACC_X_MSB (0x03) /* X accel - MSB */ |
#define BMA020_ACC_Y_LSB (0x04) /* Y accel - LSB + new data */ |
#define BMA020_ACC_Y_MSB (0x05) /* Y accel - MSB */ |
#define BMA020_ACC_Z_LSB (0x06) /* Z accel - LSB + new data */ |
#define BMA020_ACC_Z_MSB (0x07) /* Z accel - MSB */ |
#define BMA020_ANY_MOTION_THRES (0x10) /* any motion threshold */ |
#define BMA020_CHIP_ID (0x00) /* chip ID - always 0x02 */ |
BMA020 Register Addresses.
Referenced by bma020_device_id(), and bma020_init().
#define BMA020_CHIP_VERSION (0x01) /* chip revision */ |
Referenced by bma020_device_id().
#define BMA020_CTRL1 (0x0a) /* device control 1 */ |
#define BMA020_CTRL2 (0x0b) /* device control 2 */ |
#define BMA020_CTRL3 (0x11) /* motion duration & g-hysteresis */ |
#define BMA020_CTRL4 (0x14) /* range & bandwidth */ |
Referenced by bma020_set_bandwidth(), and bma020_set_range().
#define BMA020_CTRL5 (0x15) /* interrupt & wake control */ |
#define BMA020_CUST1 (0x12) /* customer reserved reg 1 */ |
#define BMA020_CUST2 (0x13) /* customer reserved reg 2 */ |
#define BMA020_DATA_RESOLUTION (10) |
Referenced by bma020_init().
#define BMA020_DATA_SHIFT_RIGHT (6) |
#define BMA020_HG_DUR (0x0f) /* high g duration */ |
#define BMA020_HG_THRES (0x0e) /* high g threshold */ |
#define BMA020_ID_VAL (0x02) /* BMA020 chip id value */ |
BMA020 Register Bit Definitions.
Referenced by bma020_init().
#define BMA020_LG_DUR (0x0d) /* low g duration */ |
#define BMA020_LG_THRES (0x0c) /* low g threshold */ |
#define BMA020_SPI_MODE (3) |
#define BMA020_STATUS1 (0x09) /* device status register 1 */ |
#define BMA020_TWI_ADDR (0x38) |
#define CTRL1_RESET_INT (0x40) /* reset interrupt */ |
#define CTRL1_SELF_TEST_0 (0x04) /* perform self test 0 */ |
Referenced by bma150_selftest().
#define CTRL1_SELF_TEST_1 (0x08) /* perform self test 1 */ |
Referenced by bma150_selftest().
#define CTRL1_SLEEP (0x01) /* enter sleep mode */ |
Referenced by bma150_set_state().
#define CTRL1_SOFT_RESET (0x02) /* reset device */ |
Referenced by bma150_set_state().
#define CTRL2_ALERT (0x80) /* enable any-motion alert mode */ |
Referenced by bma150_event().
#define CTRL2_ANY_MOTION (0x40) /* enable any-motion interrupt */ |
Referenced by bma150_event().
#define CTRL2_COUNTER_HG (0x30) /* high g int count (2 bits) */ |
#define CTRL2_COUNTER_LG (0x0c) /* low g int count (2 bits) */ |
#define CTRL2_ENABLE_HG (0x02) /* enable high g interrupt */ |
Referenced by bma150_event().
#define CTRL2_ENABLE_LG (0x01) /* enable low g interrupt */ |
Referenced by bma150_event().
#define CTRL3_ANY_MOTION_DUR (0xc0) /* any motion duration (2 bits) */ |
#define CTRL3_HG_HYST (0x28) /* high g hysteresis (3 bits) */ |
#define CTRL3_LG_HYST (0x07) /* low g hysteresis (3 bits) */ |
#define CTRL4_BANDWIDTH (0x07) /* bandwidth (3 bits) */ |
Referenced by bma020_set_bandwidth(), and bma150_set_bandwidth().
#define CTRL4_RANGE (0x18) /* range (2 bits) */ |
Referenced by bma020_set_range(), and bma150_set_range().
#define CTRL5_ENABLE_ADV_INT (0x40) /* enable advanced interrupts */ |
Referenced by bma150_event().
#define CTRL5_LATCH_INT (0x10) /* latch interrupts until reset */ |
#define CTRL5_NEW_DATA_INT (0x20) /* enable new data interrupt */ |
Referenced by bma150_event().
#define CTRL5_SHADOW_DIS (0x08) /* disable lsb/msb read blocking */ |
#define CTRL5_SPI4 (0x80) /* SPI uses 4-wire interface */ |
#define CTRL5_WAKE_UP (0x01) /* enable automatic wake up */ |
Referenced by bma150_set_state().
#define CTRL5_WAKE_UP_PAUSE (0x06) /* duration between wakes, 2bits */ |
#define RANGE_2G (0x00) /* +/- 2g */ |
#define RANGE_4G (0x08) /* +/- 4g */ |
#define RANGE_8G (0x10) /* +/- 8g */ |
#define STATUS1_HG (0x01) /* high-g currently detected */ |
#define STATUS1_HG_LATCHED (0x04) /* high-g event detected */ |
#define STATUS1_LG (0x02) /* low-g currently detected */ |
#define STATUS1_LG_LATCHED (0x08) /* low-g event detected */ |
Bosch BMA020 accelerometer driver initialization.
This is the main initialization function for the BMA020 device. The accelerometer range and bandwidth are set based on user-specified values from the system configuration.
sensor | Address of a sensor device descriptor. |
resvd | Reserved value. |
References ARRAYSIZE, band_table, sensor_hal::bandwidth, BMA020_ACC_X_LSB, BMA020_CHIP_ID, BMA020_DATA_RESOLUTION, BMA020_ID_VAL, bma020_ioctl(), bma020_read(), bma020_set_bandwidth(), bma020_set_range(), sensor_hal::burst_addr, sensor_hal::bus, sensor_desc::drv, sensor_device_t::func, sensor_desc::hal, sensor_hal::range, range_table, sensor_funcs_t::read, sensor_hal::resolution, sensor_bus_get, SENSOR_CAPS_3_AXIS, SENSOR_CAPS_HI_G_EVENT, SENSOR_CAPS_LO_G_EVENT, SENSOR_CAPS_SELFTEST, SENSOR_SCALE_milli, SENSOR_UNITS_g0, SENSOR_VENDOR_BOSCH, status, bus_desc_t::status, and STATUS_OK.