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PHY component (DM9161A)

Driver for the dm9161a component.

This driver provides access to the main features of the PHY.

Dependencies

This driver depends on the following modules:

Macros

#define ETH_PHY_MAX_ADDR   31
 
#define ETH_PHY_RETRY_MAX   1000000
 
#define ETH_PHY_TIMEOUT   10
 

Functions

uint8_t ethernet_phy_auto_negotiate (Emac *p_emac, uint8_t uc_phy_addr)
 Issue an auto negotiation of the PHY. More...
 
static uint8_t ethernet_phy_find_valid (Emac *p_emac, uint8_t uc_phy_addr, uint8_t addrStart)
 Find a valid PHY Address ( from addrStart to 31 ). More...
 
uint8_t ethernet_phy_init (Emac *p_emac, uint8_t uc_phy_addr, uint32_t mck)
 Perform a HW initialization to the PHY ( via RSTC ) and set up clocks. More...
 
uint8_t ethernet_phy_reset (Emac *p_emac, uint8_t uc_phy_addr)
 Issue a SW reset to reset all registers of the PHY. More...
 
uint8_t ethernet_phy_set_link (Emac *p_emac, uint8_t uc_phy_addr, uint8_t uc_apply_setting_flag)
 Get the Link & speed settings, and automatically set up the EMAC with the settings. More...
 

#define ETH_PHY_MAX_ADDR   31

Referenced by ethernet_phy_find_valid().

#define ETH_PHY_RETRY_MAX   1000000
#define ETH_PHY_TIMEOUT   10

Referenced by ethernet_phy_reset().

uint8_t ethernet_phy_auto_negotiate ( Emac *  p_emac,
uint8_t  uc_phy_addr 
)
static uint8_t ethernet_phy_find_valid ( Emac *  p_emac,
uint8_t  uc_phy_addr,
uint8_t  addrStart 
)
static

Find a valid PHY Address ( from addrStart to 31 ).

Parameters
p_emacPointer to the EMAC instance.
uc_phy_addrPHY address.
uc_start_addrStart address of the PHY to be searched.
Returns
0xFF when no valid PHY address is found.

References emac_enable_management(), EMAC_OK, emac_phy_read(), ETH_PHY_MAX_ADDR, MII_DSCSR, MII_OUI_MSB, and MII_PHYID1.

Referenced by ethernet_phy_init().

uint8_t ethernet_phy_init ( Emac *  p_emac,
uint8_t  uc_phy_addr,
uint32_t  mck 
)

Perform a HW initialization to the PHY ( via RSTC ) and set up clocks.

This should be called only once to initialize the PHY pre-settings. The PHY address is the reset status of CRS, RXD[3:0] (the emacPins' pullups). The COL pin is used to select MII mode on reset (pulled up for Reduced MII). The RXDV pin is used to select test mode on reset (pulled up for test mode). The above pins should be predefined for corresponding settings in resetPins. The EMAC peripheral pins are configured after the reset is done.

Parameters
p_emacPointer to the EMAC instance.
uc_phy_addrPHY address.
ul_mckEMAC MCK.

Return EMAC_OK if successfully, EMAC_TIMEOUT if timeout.

References EMAC_OK, emac_set_clock(), EMAC_TIMEOUT, ethernet_phy_find_valid(), and ethernet_phy_reset().

Referenced by low_level_init(), main(), and run_emac_link_test().

uint8_t ethernet_phy_reset ( Emac *  p_emac,
uint8_t  uc_phy_addr 
)

Issue a SW reset to reset all registers of the PHY.

Parameters
p_emacPointer to the EMAC instance.
uc_phy_addrPHY address.

EMAC_OK if successfully, EMAC_TIMEOUT if timeout.

References emac_enable_management(), EMAC_OK, emac_phy_read(), emac_phy_write(), EMAC_TIMEOUT, ETH_PHY_TIMEOUT, MII_BMCR, and MII_RESET.

Referenced by ethernet_phy_init().

uint8_t ethernet_phy_set_link ( Emac *  p_emac,
uint8_t  uc_phy_addr,
uint8_t  uc_apply_setting_flag 
)

Get the Link & speed settings, and automatically set up the EMAC with the settings.

Parameters
p_emacPointer to the EMAC instance.
uc_phy_addrPHY address.
uc_apply_setting_flagSet to 0 to not apply the PHY configurations, else to apply.

Return EMAC_OK if successfully, EMAC_TIMEOUT if timeout.

References emac_enable_full_duplex(), emac_enable_management(), EMAC_INVALID, EMAC_OK, emac_phy_read(), emac_set_speed(), EMAC_TIMEOUT, MII_100BASE_T4_HD, MII_100BASE_TX_FD, MII_100FDX, MII_100HDX, MII_10BASE_T_FD, MII_10BASE_T_HD, MII_10FDX, MII_10HDX, MII_BMSR, MII_DSCSR, and MII_LINK_STATUS.

Referenced by low_level_init(), main(), and run_emac_link_test().