Macros | |
| #define | MII_10BTCSR 18 |
| 10BASE-T Configuration and Status Register More... | |
| #define | MII_ANAR 4 |
| Auto_negotiation Advertisement Register. More... | |
| #define | MII_ANER 6 |
| Auto-negotiation Expansion Register. More... | |
| #define | MII_ANLPAR 5 |
| Auto_negotiation Link Partner Ability Register. More... | |
| #define | MII_BMCR 0 |
| Basic Mode Control Register. More... | |
| #define | MII_BMSR 1 |
| Basic Mode Status Register. More... | |
| #define | MII_CONFIGR 20 |
| Specified configure Register. More... | |
| #define | MII_DISCR 23 |
| Specified Disconnect Counter Register. More... | |
| #define | MII_DSCR 16 |
| Specified Configuration Register. More... | |
| #define | MII_DSCSR 17 |
| Specified Configuration and Status Register. More... | |
| #define | MII_MDINTR 21 |
| Specified Interrupt Register. More... | |
| #define | MII_PHYID1 2 |
| PHY Identifier Register 1. More... | |
| #define | MII_PHYID2 3 |
| PHY Identifier Register 2. More... | |
| #define | MII_PWDOR 19 |
| Power Down Control Register. More... | |
| #define | MII_RECR 22 |
| Specified Receive Error Counter Register. More... | |
| #define | MII_RLSR 24 |
| Hardware Reset Latch State Register. More... | |
| #define MII_10BTCSR 18 |
10BASE-T Configuration and Status Register
| #define MII_ANAR 4 |
Auto_negotiation Advertisement Register.
Referenced by ethernet_phy_auto_negotiate().
| #define MII_ANER 6 |
Auto-negotiation Expansion Register.
| #define MII_ANLPAR 5 |
Auto_negotiation Link Partner Ability Register.
Referenced by ethernet_phy_auto_negotiate().
| #define MII_BMCR 0 |
Basic Mode Control Register.
Referenced by ethernet_phy_auto_negotiate(), and ethernet_phy_reset().
| #define MII_BMSR 1 |
Basic Mode Status Register.
Referenced by ethernet_phy_auto_negotiate(), and ethernet_phy_set_link().
| #define MII_CONFIGR 20 |
Specified configure Register.
| #define MII_DISCR 23 |
Specified Disconnect Counter Register.
| #define MII_DSCR 16 |
Specified Configuration Register.
| #define MII_DSCSR 17 |
Specified Configuration and Status Register.
Referenced by ethernet_phy_find_valid(), and ethernet_phy_set_link().
| #define MII_MDINTR 21 |
Specified Interrupt Register.
| #define MII_PHYID1 2 |
PHY Identifier Register 1.
Referenced by ethernet_phy_find_valid().
| #define MII_PHYID2 3 |
PHY Identifier Register 2.
| #define MII_PWDOR 19 |
Power Down Control Register.
| #define MII_RECR 22 |
Specified Receive Error Counter Register.
| #define MII_RLSR 24 |
Hardware Reset Latch State Register.
1.8.5