10BASE-T Configuration/Status (10BTCSR, 18)

List Bit definitions: MII_10BTCSR.

Macros
#define	MII_10BT_SER   (1u << 10)
	10BASE-T GPSI Mode More...
#define	MII_HBE   (1u << 13)
	Heartbeat Enable. More...
#define	MII_JABEN   (1u << 11)
	Jabber Enable. More...
#define	MII_LP_EN   (1u << 14)
	Reserved: 18 to 15, Read as 0, ignore on write. More...
#define	MII_POLR   (1u << 0)
	Reserved: 9 to 1, Read as 0, ignore on write. More...
#define	MII_SQUELCH   (1u << 12)
	Squelch Enable. More...

#define MII_10BT_SER   (1u << 10)

10BASE-T GPSI Mode

#define MII_HBE   (1u << 13)

Heartbeat Enable.

#define MII_JABEN   (1u << 11)

Jabber Enable.

#define MII_LP_EN   (1u << 14)

Reserved: 18 to 15, Read as 0, ignore on write.

Link Pulse Enable

#define MII_POLR   (1u << 0)

Reserved: 9 to 1, Read as 0, ignore on write.

Polarity Reversed

#define MII_SQUELCH   (1u << 12)

Squelch Enable.