Kionix KXTF9 3-axis accelerometer.
This file contains functions for initializing and reading data from a Kionix KXTF9 3-axis accelerometer.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
#include <asf.h>
Macros | |
#define | KXTF9_DATA_RESOLUTION (12) /* full-scale data resolution */ |
#define | KXTF9_ID_VAL (0x01) /* KXTF9 device ID */ |
#define | KXTF9_TWI_ADDR (0x0f) |
#define | KXTI9_ID_VAL (0x04) /* KXTI9 device ID */ |
#define | RESET_DELAY_MSEC (5) /* ram reset polling interval */ |
#define | START_DELAY_MSEC (20) /* startup time (@200Hz sample) */ |
#define | TAP_TDT_LATENCY_TIMER_DEFAULT (0x28) /* 0.1 seconds */ |
#define | TAP_TDT_TAP_TIMER_MAX_DEFAULT (0x14) /* 0.05 seconds */ |
#define | TAP_TDT_TAP_TIMER_MIN_DEFAULT (0x02) /* 0.005 seconds */ |
#define | TAP_TDT_TIMER_DEFAULT (0x78) /* 0.3 seconds */ |
#define | TAP_TDT_TOTAL_TIMER_DEFAULT (0x24) /* 0.09 seconds */ |
#define | TAP_TDT_WINDOW_TIMER_DEFAULT (0xA0) /* 0.4 seconds */ |
#define | TAP_THRESH_MAX_DEFAULT (0xB6 << 1) /* 182 (shifted) */ |
#define | TAP_THRESH_MIN_DEFAULT (0x1A) /* 26 */ |
#define | TAP_TIMER_HZ (400) /* default tap timer frequency */ |
#define | TILT_TIMER_INIT (6) /* tilt timer value */ |
#define | WUF_TIMER_INIT (4) /* wake-up timer value */ |
#define | KXTF9_XOUT_HPF_L (0x00) /* accel high pass data - X lsb */ |
KXTF9 Register Addresses. More... | |
#define | KXTF9_XOUT_HPF_H (0x01) /* accel high pass data - X msb */ |
#define | KXTF9_YOUT_HPF_L (0x02) /* accel high pass data - Y lsb */ |
#define | KXTF9_YOUT_HPF_H (0x03) /* accel high pass data - Y msb */ |
#define | KXTF9_ZOUT_HPF_L (0x04) /* accel high pass data - Z lsb */ |
#define | KXTF9_ZOUT_HPF_H (0x05) /* accel high pass data - Z msb */ |
#define | KXTF9_XOUT_L (0x06) /* accel normal data - X lsb */ |
#define | KXTF9_XOUT_H (0x07) /* accel normal data - X msb */ |
#define | KXTF9_YOUT_L (0x08) /* accel normal data - Y lsb */ |
#define | KXTF9_YOUT_H (0x09) /* accel normal data - Y msb */ |
#define | KXTF9_ZOUT_L (0x0A) /* accel normal data - Z lsb */ |
#define | KXTF9_ZOUT_H (0x0B) /* accel normal data - Z msb */ |
#define | KXTF9_ST_RESP (0x0C) /* self test response */ |
#define | KXTF9_WHO_AM_I (0x0F) /* device ID */ |
#define | KXTF9_TILT_POS_CUR (0x10) /* current tilt position */ |
#define | KXTF9_TILT_POS_PRE (0x11) /* previous tilt position */ |
#define | KXTF9_INT_SRC_REG1 (0x15) /* interrupt source reg 1 */ |
#define | KXTF9_INT_SRC_REG2 (0x16) /* interrupt source reg 2 */ |
#define | KXTF9_STATUS_REG (0x18) /* status register */ |
#define | KXTF9_INT_REL (0x1A) /* interrupt release - read to clear */ |
#define | KXTF9_CTRL_REG1 (0x1B) /* control reg 1 */ |
#define | KXTF9_CTRL_REG2 (0x1C) /* control reg 2 */ |
#define | KXTF9_CTRL_REG3 (0x1D) /* control reg 3 */ |
#define | KXTF9_INT_CTRL_REG1 (0x1E) /* interrupt control reg 1 */ |
#define | KXTF9_INT_CTRL_REG2 (0x1F) /* interrupt control reg 2 */ |
#define | KXTF9_INT_CTRL_REG3 (0x20) /* interrupt control reg 3 */ |
#define | KXTF9_DATA_CTRL_REG (0x21) /* data control reg (b/w, data rate) */ |
#define | KXTF9_TILT_TIMER (0x28) /* tilt timer initial value */ |
#define | KXTF9_WUF_TIMER (0x29) /* motion detect timer initial value */ |
#define | KXTF9_TDT_TIMER (0x2B) /* dbl tap detect - min intertap time */ |
#define | KXTF9_TDT_H_THRESH (0x2C) /* tap detect high threshold */ |
#define | KXTF9_TDT_L_THRESH (0x2D) /* tap detect low threshold */ |
#define | KXTF9_TDT_TAP_TIMER (0x2E) /* tap detect timer, single tap */ |
#define | KXTF9_TDT_TOTAL_TIMER (0x2F) /* dbl tap detect total time limit */ |
#define | KXTF9_TDT_LATENCY_TIMER (0x30) /* tap detect latency time limit */ |
#define | KXTF9_TDT_WINDOW_TIMER (0x31) /* tap detect time window for entire tap */ |
#define | KXTF9_SELF_TEST (0x3A) /* MEMS self test enable (write 0xCA) */ |
#define | KXTF9_WUF_THRESH (0x5A) /* general motion threshold */ |
#define | KXTF9_TILT_ANGLE (0x5C) /* tilt angle threshold */ |
#define | KXTF9_HYST_SET (0x5F) /* tilt hysteresis value */ |
#define | TILT_POS_FU (0x01) /* face up (pos. Z) */ |
KXTF9 Register Bit Definitions. More... | |
#define | TILT_POS_FD (0x02) /* face down (neg. Z) */ |
#define | TILT_POS_UP (0x04) /* up (pos. Y) */ |
#define | TILT_POS_DO (0x08) /* down (neg. Y) */ |
#define | TILT_POS_RI (0x10) /* right (pos. X) */ |
#define | TILT_POS_LE (0x20) /* left (neg. X) */ |
#define | INT_SRC_REG1_TFU (0x01) /* face up (pos. Z) tap detected */ |
#define | INT_SRC_REG1_TFD (0x02) /* face down (neg. Z) tap detected */ |
#define | INT_SRC_REG1_TUP (0x04) /* up (pos. Y) tap detected */ |
#define | INT_SRC_REG1_TDO (0x08) /* down (neg. Y) tap detected */ |
#define | INT_SRC_REG1_TRI (0x10) /* right (pos. X) tap detected */ |
#define | INT_SRC_REG1_TLE (0x20) /* left (neg. X) tap detected */ |
#define | INT_SRC_REG2_TPS (0x01) /* tilt position change reported */ |
#define | INT_SRC_REG2_WUFS (0x02) /* motion wake up reported */ |
#define | INT_SRC_REG2_TD (0x0C) /* directional tap detected (2 bits) */ |
#define | INT_SRC_REG2_TD_SINGLE (0x04) /* single tap */ |
#define | INT_SRC_REG2_TD_DOUBLE (0x08) /* double tap */ |
#define | INT_SRC_REG2_DRDY (0x10) /* new data ready */ |
#define | STATUS_INT (0x10) /* interrupt has occurred */ |
#define | CTRL_REG1_TPE (0x01) /* enables tilt position function */ |
#define | CTRL_REG1_WUFE (0x02) /* enables wake up function */ |
#define | CTRL_REG1_TDTE (0x04) /* enables directional tap function */ |
#define | CTRL_REG1_GSEL (0x18) /* g range select mask (2 bits */ |
#define | CTRL_REG1_GSEL_2G (0x00) /* range = +/- 2g */ |
#define | CTRL_REG1_GSEL_4G (0x08) /* range = +/- 4g */ |
#define | CTRL_REG1_GSEL_8G (0x10) /* range = +/- 8g */ |
#define | CTRL_REG1_DRDYE (0x20) /* data ready data output on int pin */ |
#define | CTRL_REG1_RES (0x40) /* resolution: 0 = 8-bit, 1 = 12-bit */ |
#define | CTRL_REG1_PC1 (0x80) /* mode: 0 = standby, 1 = full power */ |
#define | CTRL_REG2_FUM (0x01) /* face up state mask */ |
#define | CTRL_REG2_FDM (0x02) /* face down state mask */ |
#define | CTRL_REG2_UPM (0x04) /* up state mask */ |
#define | CTRL_REG2_DOM (0x08) /* down state mask */ |
#define | CTRL_REG2_RIM (0x10) /* right state mask */ |
#define | CTRL_REG2_LEM (0x20) /* left state mask */ |
#define | CTRL_REG3_OWUF (0x03) /* active mode output data rate mask */ |
#define | CTRL_REG3_OWUF_25HZ (0x00) /* ODR = 25 Hz */ |
#define | CTRL_REG3_OWUF_50HZ (0x01) /* ODR = 50 Hz */ |
#define | CTRL_REG3_OWUF_100HZ (0x02) /* ODR = 100 Hz */ |
#define | CTRL_REG3_OWUF_200HZ (0x03) /* ODR = 200 Hz */ |
#define | CTRL_REG3_OTDT (0x0C) /* directional tap output data rate mask */ |
#define | CTRL_REG3_OTDT_50HZ (0x00) /* ODR = 50 Hz */ |
#define | CTRL_REG3_OTDT_100HZ (0x04) /* ODR = 100 Hz */ |
#define | CTRL_REG3_OTDT_200HZ (0x08) /* ODR = 200 Hz */ |
#define | CTRL_REG3_OTDT_400HZ (0x0C) /* ODR = 400 Hz */ |
#define | CTRL_REG3_DCST (0x10) /* initiates self-test function */ |
#define | CTRL_REG3_OTP (0x60) /* tilt position output data rate mask */ |
#define | CTRL_REG3_OTP_1_6HZ (0x00) /* ODR = 1.6 Hz */ |
#define | CTRL_REG3_OTP_6_3HZ (0x20) /* ODR = 6.3 Hz */ |
#define | CTRL_REG3_OTP_12_5HZ (0x40) /* ODR = 12.5 Hz */ |
#define | CTRL_REG3_OTP_50HZ (0x60) /* ODR = 50 Hz */ |
#define | CTRL_REG3_SRST (0x80) /* software reset */ |
#define | INT_CTRL_REG1_IEU (0x04) /* alternate unlatched response (WUF) */ |
#define | INT_CTRL_REG1_IEL (0x08) /* int output latch disable */ |
#define | INT_CTRL_REG1_IEA (0x10) /* int output 0=active low, 1=active hi */ |
#define | INT_CTRL_REG1_IEN (0x20) /* enable pin output */ |
#define | INT_CTRL_REG2_XBW (0x80) /* X-axis motion interrupt enable */ |
#define | INT_CTRL_REG2_YBW (0x40) /* Y-axis motion interrupt enable */ |
#define | INT_CTRL_REG2_ZBW (0x20) /* Z-axis motion interrupt enable */ |
#define | INT_CTRL_REG3_TFUM (0x01) /* face up (pos. Z) tap int enable */ |
#define | INT_CTRL_REG3_TFDM (0x02) /* face down (neg. Z) tap int enable */ |
#define | INT_CTRL_REG3_TUPM (0x04) /* up (pos. Y) tap int enable */ |
#define | INT_CTRL_REG3_TDOM (0x08) /* down (neg. Y) tap int enable */ |
#define | INT_CTRL_REG3_TRIM (0x10) /* right (pos. X) tap int enable */ |
#define | INT_CTRL_REG3_TLEM (0x20) /* left (neg. X) tap int enable */ |
#define | DATA_CTRL_ODR (0x07) /* low-pass output data rate mask */ |
#define | DATA_CTRL_ODR_12_5HZ (0x00) /* ODR = 12.5 Hz */ |
#define | DATA_CTRL_ODR_25HZ (0x01) /* ODR = 25 Hz */ |
#define | DATA_CTRL_ODR_50HZ (0x02) /* ODR = 50 Hz */ |
#define | DATA_CTRL_ODR_100HZ (0x03) /* ODR = 100 Hz */ |
#define | DATA_CTRL_ODR_200HZ (0x04) /* ODR = 200 Hz */ |
#define | DATA_CTRL_ODR_400HZ (0x05) /* ODR = 400 Hz */ |
#define | DATA_CTRL_ODR_800HZ (0x06) /* ODR = 800 Hz */ |
#define | DATA_CTRL_HPFRO (0x30) /* high-pass filter roll-off freq */ |
#define | DATA_CTRL_HPFRO_50HZ (0x00) /* roll-off = 50 Hz */ |
#define | DATA_CTRL_HPFRO_100HZ (0x10) /* roll-off = 100 Hz */ |
#define | DATA_CTRL_HPFRO_200HZ (0x20) /* roll-off = 200 Hz */ |
#define | DATA_CTRL_HPFRO_400HZ (0x30) /* roll-off = 400 Hz */ |
#define | TDT_H_THRESH_MSB (0xFF) /* tap high threshold bits 1 to 8 */ |
#define | TDT_H_THRESH_LSB (0x01) /* tap high threshold bit 0 */ |
#define | TDT_L_THRESH (0x7F) /* tap high threshold bits 1 to 8 */ |
#define | SELF_TEST_DISABLE (0x00) /* end self test, return to normal mode */ |
#define | SELF_TEST_ENABLE (0xCA) /* start self test */ |
Functions | |
bool | kxtf9_init (sensor_t *, int) |
Kionix KXTF9 accelerometer driver initialization. More... | |
#define CTRL_REG1_DRDYE (0x20) /* data ready data output on int pin */ |
Referenced by kxtf9_event().
#define CTRL_REG1_GSEL (0x18) /* g range select mask (2 bits */ |
Referenced by kxtf9_set_range().
#define CTRL_REG1_GSEL_2G (0x00) /* range = +/- 2g */ |
#define CTRL_REG1_GSEL_4G (0x08) /* range = +/- 4g */ |
#define CTRL_REG1_GSEL_8G (0x10) /* range = +/- 8g */ |
#define CTRL_REG1_PC1 (0x80) /* mode: 0 = standby, 1 = full power */ |
Referenced by kxtf9_init(), kxtf9_set_state(), and kxtf9_standby().
#define CTRL_REG1_RES (0x40) /* resolution: 0 = 8-bit, 1 = 12-bit */ |
Referenced by kxtf9_init().
#define CTRL_REG1_TDTE (0x04) /* enables directional tap function */ |
Referenced by kxtf9_event().
#define CTRL_REG1_TPE (0x01) /* enables tilt position function */ |
Referenced by kxtf9_event().
#define CTRL_REG1_WUFE (0x02) /* enables wake up function */ |
Referenced by kxtf9_event().
#define CTRL_REG2_DOM (0x08) /* down state mask */ |
#define CTRL_REG2_FDM (0x02) /* face down state mask */ |
#define CTRL_REG2_FUM (0x01) /* face up state mask */ |
#define CTRL_REG2_LEM (0x20) /* left state mask */ |
#define CTRL_REG2_RIM (0x10) /* right state mask */ |
#define CTRL_REG2_UPM (0x04) /* up state mask */ |
#define CTRL_REG3_DCST (0x10) /* initiates self-test function */ |
#define CTRL_REG3_OTDT (0x0C) /* directional tap output data rate mask */ |
#define CTRL_REG3_OTDT_100HZ (0x04) /* ODR = 100 Hz */ |
#define CTRL_REG3_OTDT_200HZ (0x08) /* ODR = 200 Hz */ |
#define CTRL_REG3_OTDT_400HZ (0x0C) /* ODR = 400 Hz */ |
Referenced by kxtf9_init().
#define CTRL_REG3_OTDT_50HZ (0x00) /* ODR = 50 Hz */ |
#define CTRL_REG3_OTP (0x60) /* tilt position output data rate mask */ |
#define CTRL_REG3_OTP_12_5HZ (0x40) /* ODR = 12.5 Hz */ |
#define CTRL_REG3_OTP_1_6HZ (0x00) /* ODR = 1.6 Hz */ |
#define CTRL_REG3_OTP_50HZ (0x60) /* ODR = 50 Hz */ |
#define CTRL_REG3_OTP_6_3HZ (0x20) /* ODR = 6.3 Hz */ |
Referenced by kxtf9_init().
#define CTRL_REG3_OWUF (0x03) /* active mode output data rate mask */ |
#define CTRL_REG3_OWUF_100HZ (0x02) /* ODR = 100 Hz */ |
#define CTRL_REG3_OWUF_200HZ (0x03) /* ODR = 200 Hz */ |
#define CTRL_REG3_OWUF_25HZ (0x00) /* ODR = 25 Hz */ |
#define CTRL_REG3_OWUF_50HZ (0x01) /* ODR = 50 Hz */ |
Referenced by kxtf9_init().
#define CTRL_REG3_SRST (0x80) /* software reset */ |
Referenced by kxtf9_init(), and kxtf9_set_state().
#define DATA_CTRL_HPFRO (0x30) /* high-pass filter roll-off freq */ |
#define DATA_CTRL_HPFRO_100HZ (0x10) /* roll-off = 100 Hz */ |
#define DATA_CTRL_HPFRO_200HZ (0x20) /* roll-off = 200 Hz */ |
#define DATA_CTRL_HPFRO_400HZ (0x30) /* roll-off = 400 Hz */ |
#define DATA_CTRL_HPFRO_50HZ (0x00) /* roll-off = 50 Hz */ |
#define DATA_CTRL_ODR (0x07) /* low-pass output data rate mask */ |
Referenced by kxtf9_set_bandwidth().
#define DATA_CTRL_ODR_100HZ (0x03) /* ODR = 100 Hz */ |
#define DATA_CTRL_ODR_12_5HZ (0x00) /* ODR = 12.5 Hz */ |
#define DATA_CTRL_ODR_200HZ (0x04) /* ODR = 200 Hz */ |
Referenced by kxtf9_init().
#define DATA_CTRL_ODR_25HZ (0x01) /* ODR = 25 Hz */ |
#define DATA_CTRL_ODR_400HZ (0x05) /* ODR = 400 Hz */ |
#define DATA_CTRL_ODR_50HZ (0x02) /* ODR = 50 Hz */ |
#define DATA_CTRL_ODR_800HZ (0x06) /* ODR = 800 Hz */ |
#define INT_CTRL_REG1_IEA (0x10) /* int output 0=active low, 1=active hi */ |
Referenced by kxtf9_event(), and kxtf9_init().
#define INT_CTRL_REG1_IEL (0x08) /* int output latch disable */ |
Referenced by kxtf9_event(), and kxtf9_init().
#define INT_CTRL_REG1_IEN (0x20) /* enable pin output */ |
Referenced by kxtf9_event(), and kxtf9_init().
#define INT_CTRL_REG1_IEU (0x04) /* alternate unlatched response (WUF) */ |
#define INT_CTRL_REG2_XBW (0x80) /* X-axis motion interrupt enable */ |
#define INT_CTRL_REG2_YBW (0x40) /* Y-axis motion interrupt enable */ |
#define INT_CTRL_REG2_ZBW (0x20) /* Z-axis motion interrupt enable */ |
#define INT_CTRL_REG3_TDOM (0x08) /* down (neg. Y) tap int enable */ |
Referenced by kxtf9_set_tap().
#define INT_CTRL_REG3_TFDM (0x02) /* face down (neg. Z) tap int enable */ |
Referenced by kxtf9_set_tap().
#define INT_CTRL_REG3_TFUM (0x01) /* face up (pos. Z) tap int enable */ |
Referenced by kxtf9_set_tap().
#define INT_CTRL_REG3_TLEM (0x20) /* left (neg. X) tap int enable */ |
Referenced by kxtf9_set_tap().
#define INT_CTRL_REG3_TRIM (0x10) /* right (pos. X) tap int enable */ |
Referenced by kxtf9_set_tap().
#define INT_CTRL_REG3_TUPM (0x04) /* up (pos. Y) tap int enable */ |
Referenced by kxtf9_set_tap().
#define INT_SRC_REG1_TDO (0x08) /* down (neg. Y) tap detected */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG1_TFD (0x02) /* face down (neg. Z) tap detected */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG1_TFU (0x01) /* face up (pos. Z) tap detected */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG1_TLE (0x20) /* left (neg. X) tap detected */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG1_TRI (0x10) /* right (pos. X) tap detected */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG1_TUP (0x04) /* up (pos. Y) tap detected */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG2_DRDY (0x10) /* new data ready */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG2_TD (0x0C) /* directional tap detected (2 bits) */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG2_TD_DOUBLE (0x08) /* double tap */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG2_TD_SINGLE (0x04) /* single tap */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG2_TPS (0x01) /* tilt position change reported */ |
Referenced by kxtf9_isr().
#define INT_SRC_REG2_WUFS (0x02) /* motion wake up reported */ |
Referenced by kxtf9_isr().
#define KXTF9_CTRL_REG1 (0x1B) /* control reg 1 */ |
Referenced by kxtf9_event(), kxtf9_init(), kxtf9_resume(), kxtf9_set_range(), kxtf9_set_state(), and kxtf9_standby().
#define KXTF9_CTRL_REG2 (0x1C) /* control reg 2 */ |
#define KXTF9_CTRL_REG3 (0x1D) /* control reg 3 */ |
Referenced by kxtf9_init(), and kxtf9_set_state().
#define KXTF9_DATA_CTRL_REG (0x21) /* data control reg (b/w, data rate) */ |
Referenced by kxtf9_init(), and kxtf9_set_bandwidth().
#define KXTF9_DATA_RESOLUTION (12) /* full-scale data resolution */ |
Referenced by kxtf9_init().
#define KXTF9_HYST_SET (0x5F) /* tilt hysteresis value */ |
#define KXTF9_ID_VAL (0x01) /* KXTF9 device ID */ |
Referenced by kxtf9_init().
#define KXTF9_INT_CTRL_REG1 (0x1E) /* interrupt control reg 1 */ |
Referenced by kxtf9_event(), and kxtf9_init().
#define KXTF9_INT_CTRL_REG2 (0x1F) /* interrupt control reg 2 */ |
#define KXTF9_INT_CTRL_REG3 (0x20) /* interrupt control reg 3 */ |
Referenced by kxtf9_set_tap().
#define KXTF9_INT_REL (0x1A) /* interrupt release - read to clear */ |
Referenced by kxtf9_init().
#define KXTF9_INT_SRC_REG1 (0x15) /* interrupt source reg 1 */ |
Referenced by kxtf9_isr().
#define KXTF9_INT_SRC_REG2 (0x16) /* interrupt source reg 2 */ |
#define KXTF9_SELF_TEST (0x3A) /* MEMS self test enable (write 0xCA) */ |
#define KXTF9_ST_RESP (0x0C) /* self test response */ |
#define KXTF9_STATUS_REG (0x18) /* status register */ |
#define KXTF9_TDT_H_THRESH (0x2C) /* tap detect high threshold */ |
#define KXTF9_TDT_L_THRESH (0x2D) /* tap detect low threshold */ |
#define KXTF9_TDT_LATENCY_TIMER (0x30) /* tap detect latency time limit */ |
#define KXTF9_TDT_TAP_TIMER (0x2E) /* tap detect timer, single tap */ |
#define KXTF9_TDT_TIMER (0x2B) /* dbl tap detect - min intertap time */ |
Referenced by kxtf9_set_tap().
#define KXTF9_TDT_TOTAL_TIMER (0x2F) /* dbl tap detect total time limit */ |
#define KXTF9_TDT_WINDOW_TIMER (0x31) /* tap detect time window for entire tap */ |
#define KXTF9_TILT_ANGLE (0x5C) /* tilt angle threshold */ |
#define KXTF9_TILT_POS_CUR (0x10) /* current tilt position */ |
Referenced by kxtf9_isr().
#define KXTF9_TILT_POS_PRE (0x11) /* previous tilt position */ |
#define KXTF9_TILT_TIMER (0x28) /* tilt timer initial value */ |
Referenced by kxtf9_init().
#define KXTF9_TWI_ADDR (0x0f) |
#define KXTF9_WHO_AM_I (0x0F) /* device ID */ |
Referenced by kxtf9_device_id(), and kxtf9_init().
#define KXTF9_WUF_THRESH (0x5A) /* general motion threshold */ |
Referenced by kxtf9_get_threshold(), and kxtf9_set_threshold().
#define KXTF9_WUF_TIMER (0x29) /* motion detect timer initial value */ |
Referenced by kxtf9_init().
#define KXTF9_XOUT_H (0x07) /* accel normal data - X msb */ |
#define KXTF9_XOUT_HPF_H (0x01) /* accel high pass data - X msb */ |
#define KXTF9_XOUT_HPF_L (0x00) /* accel high pass data - X lsb */ |
KXTF9 Register Addresses.
#define KXTF9_XOUT_L (0x06) /* accel normal data - X lsb */ |
Referenced by kxtf9_init().
#define KXTF9_YOUT_H (0x09) /* accel normal data - Y msb */ |
#define KXTF9_YOUT_HPF_H (0x03) /* accel high pass data - Y msb */ |
#define KXTF9_YOUT_HPF_L (0x02) /* accel high pass data - Y lsb */ |
#define KXTF9_YOUT_L (0x08) /* accel normal data - Y lsb */ |
#define KXTF9_ZOUT_H (0x0B) /* accel normal data - Z msb */ |
#define KXTF9_ZOUT_HPF_H (0x05) /* accel high pass data - Z msb */ |
#define KXTF9_ZOUT_HPF_L (0x04) /* accel high pass data - Z lsb */ |
#define KXTF9_ZOUT_L (0x0A) /* accel normal data - Z lsb */ |
#define KXTI9_ID_VAL (0x04) /* KXTI9 device ID */ |
Referenced by kxtf9_init().
#define RESET_DELAY_MSEC (5) /* ram reset polling interval */ |
Referenced by kxtf9_init(), and kxtf9_set_state().
#define SELF_TEST_DISABLE (0x00) /* end self test, return to normal mode */ |
#define SELF_TEST_ENABLE (0xCA) /* start self test */ |
#define START_DELAY_MSEC (20) /* startup time (@200Hz sample) */ |
Referenced by kxtf9_init().
#define STATUS_INT (0x10) /* interrupt has occurred */ |
Referenced by kxtf9_isr().
#define TAP_TDT_LATENCY_TIMER_DEFAULT (0x28) /* 0.1 seconds */ |
Referenced by kxtf9_set_tap().
#define TAP_TDT_TAP_TIMER_MAX_DEFAULT (0x14) /* 0.05 seconds */ |
Referenced by kxtf9_set_tap().
#define TAP_TDT_TAP_TIMER_MIN_DEFAULT (0x02) /* 0.005 seconds */ |
Referenced by kxtf9_set_tap().
#define TAP_TDT_TIMER_DEFAULT (0x78) /* 0.3 seconds */ |
Referenced by kxtf9_set_tap().
#define TAP_TDT_TOTAL_TIMER_DEFAULT (0x24) /* 0.09 seconds */ |
Referenced by kxtf9_set_tap().
#define TAP_TDT_WINDOW_TIMER_DEFAULT (0xA0) /* 0.4 seconds */ |
Referenced by kxtf9_set_tap().
#define TAP_THRESH_MAX_DEFAULT (0xB6 << 1) /* 182 (shifted) */ |
Referenced by kxtf9_set_tap().
#define TAP_THRESH_MIN_DEFAULT (0x1A) /* 26 */ |
Referenced by kxtf9_set_tap().
#define TAP_TIMER_HZ (400) /* default tap timer frequency */ |
Referenced by kxtf9_set_tap().
#define TDT_H_THRESH_LSB (0x01) /* tap high threshold bit 0 */ |
#define TDT_H_THRESH_MSB (0xFF) /* tap high threshold bits 1 to 8 */ |
#define TDT_L_THRESH (0x7F) /* tap high threshold bits 1 to 8 */ |
Referenced by kxtf9_set_tap().
#define TILT_POS_DO (0x08) /* down (neg. Y) */ |
#define TILT_POS_FD (0x02) /* face down (neg. Z) */ |
#define TILT_POS_FU (0x01) /* face up (pos. Z) */ |
KXTF9 Register Bit Definitions.
#define TILT_POS_LE (0x20) /* left (neg. X) */ |
#define TILT_POS_RI (0x10) /* right (pos. X) */ |
#define TILT_POS_UP (0x04) /* up (pos. Y) */ |
#define TILT_TIMER_INIT (6) /* tilt timer value */ |
Referenced by kxtf9_init().
#define WUF_TIMER_INIT (4) /* wake-up timer value */ |
Referenced by kxtf9_init().
Kionix KXTF9 accelerometer driver initialization.
This is the main initialization function for the KXTF9 device.
sensor | Address of a sensor device descriptor. |
resvd | Reserved value. |
References ARRAYSIZE, band_table, sensor_hal::bandwidth, sensor_map_t::bandwidth_Hz, sensor_hal::burst_addr, sensor_hal::bus, CTRL_REG1_PC1, CTRL_REG1_RES, CTRL_REG3_OTDT_400HZ, CTRL_REG3_OTP_6_3HZ, CTRL_REG3_OWUF_50HZ, CTRL_REG3_SRST, DATA_CTRL_ODR_200HZ, delay_ms, sensor_desc::drv, sensor_device_t::func, sensor_desc::hal, INDEX_2G, INT_CTRL_REG1_IEA, INT_CTRL_REG1_IEL, INT_CTRL_REG1_IEN, KXTF9_CTRL_REG1, KXTF9_CTRL_REG3, KXTF9_DATA_CTRL_REG, KXTF9_DATA_RESOLUTION, kxtf9_event(), KXTF9_ID_VAL, KXTF9_INT_CTRL_REG1, KXTF9_INT_REL, kxtf9_ioctl(), kxtf9_isr(), kxtf9_read(), KXTF9_TILT_TIMER, KXTF9_WHO_AM_I, KXTF9_WUF_TIMER, KXTF9_XOUT_L, KXTI9_ID_VAL, sensor_hal::mcu_sigint, ODR_INDEX_50HZ, sensor_hal::range, range_table, sensor_map_t::range_units, sensor_funcs_t::read, RESET_DELAY_MSEC, sensor_hal::resolution, sensor_hal::sample_rate, sensor_bus_get, sensor_bus_put, SENSOR_CAPS_3_AXIS, SENSOR_CAPS_HI_G_EVENT, SENSOR_CAPS_LO_G_EVENT, SENSOR_CAPS_SELFTEST, SENSOR_CAPS_TAP_EVENT, SENSOR_CAPS_TILT_EVENT, sensor_irq_connect(), SENSOR_SCALE_milli, SENSOR_UNITS_g0, SENSOR_VENDOR_KIONIX, START_DELAY_MSEC, status, bus_desc_t::status, STATUS_OK, TILT_TIMER_INIT, and WUF_TIMER_INIT.